mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-08-12 00:29:20 +00:00
d04a8d4b33
Sooooo many of these had incorrect or strange main module includes. I have manually inspected all of these, and fixed the main module include to be the nearest plausible thing I could find. If you own or care about any of these source files, I encourage you to take some time and check that these edits were sensible. I can't have broken anything (I strictly added headers, and reordered them, never removed), but they may not be the headers you'd really like to identify as containing the API being implemented. Many forward declarations and missing includes were added to a header files to allow them to parse cleanly when included first. The main module rule does in fact have its merits. =] git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169131 91177308-0d34-0410-b5e6-96231b3b80d8
81 lines
3.0 KiB
C++
81 lines
3.0 KiB
C++
//===-- SparcFrameLowering.cpp - Sparc Frame Information ------------------===//
|
|
//
|
|
// The LLVM Compiler Infrastructure
|
|
//
|
|
// This file is distributed under the University of Illinois Open Source
|
|
// License. See LICENSE.TXT for details.
|
|
//
|
|
//===----------------------------------------------------------------------===//
|
|
//
|
|
// This file contains the Sparc implementation of TargetFrameLowering class.
|
|
//
|
|
//===----------------------------------------------------------------------===//
|
|
|
|
#include "SparcFrameLowering.h"
|
|
#include "SparcInstrInfo.h"
|
|
#include "SparcMachineFunctionInfo.h"
|
|
#include "llvm/CodeGen/MachineFrameInfo.h"
|
|
#include "llvm/CodeGen/MachineFunction.h"
|
|
#include "llvm/CodeGen/MachineInstrBuilder.h"
|
|
#include "llvm/CodeGen/MachineModuleInfo.h"
|
|
#include "llvm/CodeGen/MachineRegisterInfo.h"
|
|
#include "llvm/DataLayout.h"
|
|
#include "llvm/Function.h"
|
|
#include "llvm/Support/CommandLine.h"
|
|
#include "llvm/Target/TargetOptions.h"
|
|
|
|
using namespace llvm;
|
|
|
|
void SparcFrameLowering::emitPrologue(MachineFunction &MF) const {
|
|
MachineBasicBlock &MBB = MF.front();
|
|
MachineFrameInfo *MFI = MF.getFrameInfo();
|
|
const SparcInstrInfo &TII =
|
|
*static_cast<const SparcInstrInfo*>(MF.getTarget().getInstrInfo());
|
|
MachineBasicBlock::iterator MBBI = MBB.begin();
|
|
DebugLoc dl = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
|
|
|
|
// Get the number of bytes to allocate from the FrameInfo
|
|
int NumBytes = (int) MFI->getStackSize();
|
|
|
|
// Emit the correct save instruction based on the number of bytes in
|
|
// the frame. Minimum stack frame size according to V8 ABI is:
|
|
// 16 words for register window spill
|
|
// 1 word for address of returned aggregate-value
|
|
// + 6 words for passing parameters on the stack
|
|
// ----------
|
|
// 23 words * 4 bytes per word = 92 bytes
|
|
NumBytes += 92;
|
|
|
|
// Round up to next doubleword boundary -- a double-word boundary
|
|
// is required by the ABI.
|
|
NumBytes = (NumBytes + 7) & ~7;
|
|
NumBytes = -NumBytes;
|
|
|
|
if (NumBytes >= -4096) {
|
|
BuildMI(MBB, MBBI, dl, TII.get(SP::SAVEri), SP::O6)
|
|
.addReg(SP::O6).addImm(NumBytes);
|
|
} else {
|
|
// Emit this the hard way. This clobbers G1 which we always know is
|
|
// available here.
|
|
unsigned OffHi = (unsigned)NumBytes >> 10U;
|
|
BuildMI(MBB, MBBI, dl, TII.get(SP::SETHIi), SP::G1).addImm(OffHi);
|
|
// Emit G1 = G1 + I6
|
|
BuildMI(MBB, MBBI, dl, TII.get(SP::ORri), SP::G1)
|
|
.addReg(SP::G1).addImm(NumBytes & ((1 << 10)-1));
|
|
BuildMI(MBB, MBBI, dl, TII.get(SP::SAVErr), SP::O6)
|
|
.addReg(SP::O6).addReg(SP::G1);
|
|
}
|
|
}
|
|
|
|
void SparcFrameLowering::emitEpilogue(MachineFunction &MF,
|
|
MachineBasicBlock &MBB) const {
|
|
MachineBasicBlock::iterator MBBI = MBB.getLastNonDebugInstr();
|
|
const SparcInstrInfo &TII =
|
|
*static_cast<const SparcInstrInfo*>(MF.getTarget().getInstrInfo());
|
|
DebugLoc dl = MBBI->getDebugLoc();
|
|
assert(MBBI->getOpcode() == SP::RETL &&
|
|
"Can only put epilog before 'retl' instruction!");
|
|
BuildMI(MBB, MBBI, dl, TII.get(SP::RESTORErr), SP::G0).addReg(SP::G0)
|
|
.addReg(SP::G0);
|
|
}
|