Javed Absar 5511d97506 [ARM] Cortex-R4F is not VFPOnlySP ... Cortex-R4F TRM states that fpu supports both single and double precision. This patch corrects the information in ARM.td file and corresponding test. Reviewers: rengolin Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D10763 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240776 91177308-0d34-0410-b5e6-96231b3b80d8		2015-06-26 12:14:56 +00:00
..
Analysis
Assembler
Bindings
Bitcode
BugPoint
CodeGen	[ARM] Cortex-R4F is not VFPOnlySP	2015-06-26 12:14:56 +00:00
DebugInfo	Make llvm-dwarfdump exit with non-zero exit code if error was occured.	2015-06-25 23:40:15 +00:00
ExecutionEngine
Feature
FileCheck
Instrumentation	[asan] Do not instrument special purpose LLVM sections.	2015-06-25 23:35:48 +00:00
Integer
JitListener
LibDriver
Linker
LTO
MC	Diagnose undefined temporary symbols.	2015-06-25 20:10:45 +00:00
Object	[Object][ELF] Add support for dumping dynamic relocations when sections are stripped.	2015-06-25 21:47:32 +00:00
Other
SymbolRewriter
TableGen
tools
Transforms	[InstCombine] call SimplifyICmpInst with correct context	2015-06-25 20:14:47 +00:00
Unit
Verifier
YAMLParser
.clang-format
CMakeLists.txt
lit.cfg
lit.site.cfg.in
Makefile
Makefile.tests
TestRunner.sh