Tim Northover 5530ac99e6 ARM: treat [N x i32] and [N x i64] as AAPCS composite types ... The logic is almost there already, with our special homogeneous aggregate handling. Tweaking it like this allows front-ends to emit AAPCS compliant code without ever having to count registers or add discarded padding arguments. Only arrays of i32 and i64 are needed to model AAPCS rules, but I decided to apply the logic to all integer arrays for more consistency. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230348 91177308-0d34-0410-b5e6-96231b3b80d8		2015-02-24 17:22:34 +00:00
..
llvm	ARM: treat [N x i32] and [N x i64] as AAPCS composite types	2015-02-24 17:22:34 +00:00
llvm-c	[LTO API] add lto_codegen_set_module to set the destination module.	2015-02-24 00:45:56 +00:00