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https://github.com/c64scene-ar/llvm-6502.git
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76ff741836
Also make sure registers aren't erased twice if the dead def mentions the register twice. This fixes PR12911. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157254 91177308-0d34-0410-b5e6-96231b3b80d8
119 lines
5.3 KiB
LLVM
119 lines
5.3 KiB
LLVM
; RUN: llc < %s -verify-coalescing
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; PR12911
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target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
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target triple = "x86_64-apple-macosx10.7.0"
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@d = common global i32 0, align 4
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@c = common global i32 0, align 4
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@b = common global i32 0, align 4
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@h = common global i32 0, align 4
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@f = common global i32 0, align 4
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@g = common global i32 0, align 4
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@a = common global i16 0, align 2
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@e = common global i32 0, align 4
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define void @fn1() nounwind uwtable ssp {
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entry:
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%0 = load i32* @d, align 4
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%tobool72 = icmp eq i32 %0, 0
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br i1 %tobool72, label %for.end32, label %for.cond1.preheader.lr.ph
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for.cond1.preheader.lr.ph: ; preds = %entry
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%1 = load i32* @c, align 4
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%tobool2 = icmp eq i32 %1, 0
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%2 = load i32* @b, align 4
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%cmp = icmp sgt i32 %2, 0
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%conv = zext i1 %cmp to i32
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%3 = load i32* @g, align 4
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%tobool4 = icmp eq i32 %3, 0
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%4 = load i16* @a, align 2
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%tobool9 = icmp eq i16 %4, 0
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br label %for.cond1.preheader
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for.cond1.preheader: ; preds = %for.cond25.loopexit.us-lcssa.us-lcssa, %if.end.us50, %if.end.us, %if.end.us.us, %for.cond1.preheader.lr.ph
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%j.073 = phi i32 [ undef, %for.cond1.preheader.lr.ph ], [ %j.1.us.us, %if.end.us.us ], [ %j.1.us, %if.end.us ], [ %j.073, %for.cond25.loopexit.us-lcssa.us-lcssa ], [ %j.1.us36, %if.end.us50 ]
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br i1 %tobool2, label %for.cond1.preheader.split.us, label %for.cond1.preheader.for.cond1.preheader.split_crit_edge
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for.cond1.preheader.for.cond1.preheader.split_crit_edge: ; preds = %for.cond1.preheader
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br i1 %tobool9, label %if.end.us50, label %for.cond1.preheader.split.for.cond1.preheader.split.split_crit_edge
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for.cond1.preheader.split.us: ; preds = %for.cond1.preheader
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br i1 %tobool9, label %cond.end.us.us, label %cond.end.us
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cond.false18.us.us: ; preds = %if.end.us.us
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%5 = load i32* @f, align 4
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%sext76 = shl i32 %5, 16
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%phitmp75 = ashr exact i32 %sext76, 16
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br label %cond.end.us.us
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if.end.us.us: ; preds = %cond.end.us.us, %if.then.us.us
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br i1 %tobool4, label %cond.false18.us.us, label %for.cond1.preheader
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if.then.us.us: ; preds = %cond.end.us.us
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store i32 0, i32* @f, align 4
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br label %if.end.us.us
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cond.end.us.us: ; preds = %cond.false18.us.us, %for.cond1.preheader.split.us
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%j.1.us.us = phi i32 [ %j.073, %for.cond1.preheader.split.us ], [ %phitmp75, %cond.false18.us.us ]
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store i32 %conv, i32* @h, align 4
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br i1 %cmp, label %if.then.us.us, label %if.end.us.us
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cond.end21.us: ; preds = %land.lhs.true12.us, %cond.false18.us
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%cond22.us = phi i16 [ %add.us, %cond.false18.us ], [ %4, %land.lhs.true12.us ]
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%conv24.us = sext i16 %cond22.us to i32
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br label %cond.end.us
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cond.false18.us: ; preds = %if.end6.us, %land.lhs.true12.us
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%add.us = add i16 %4, %conv7.us
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br label %cond.end21.us
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land.lhs.true12.us: ; preds = %if.end6.us
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%conv10.us = sext i16 %conv7.us to i32
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%sub.us = sub nsw i32 0, %conv10.us
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%cmp14.us = icmp slt i32 %sub.us, 1
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br i1 %cmp14.us, label %cond.end21.us, label %cond.false18.us
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if.end6.us: ; preds = %if.end.us
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%6 = load i32* @f, align 4
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%conv7.us = trunc i32 %6 to i16
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%tobool11.us = icmp eq i16 %conv7.us, 0
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br i1 %tobool11.us, label %cond.false18.us, label %land.lhs.true12.us
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if.end.us: ; preds = %cond.end.us, %if.then.us
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br i1 %tobool4, label %if.end6.us, label %for.cond1.preheader
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if.then.us: ; preds = %cond.end.us
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store i32 0, i32* @f, align 4
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br label %if.end.us
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cond.end.us: ; preds = %cond.end21.us, %for.cond1.preheader.split.us
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%j.1.us = phi i32 [ %conv24.us, %cond.end21.us ], [ %j.073, %for.cond1.preheader.split.us ]
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store i32 %conv, i32* @h, align 4
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br i1 %cmp, label %if.then.us, label %if.end.us
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for.cond1.preheader.split.for.cond1.preheader.split.split_crit_edge: ; preds = %for.cond1.preheader.for.cond1.preheader.split_crit_edge
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br i1 %tobool4, label %if.end6.us65, label %for.cond25.loopexit.us-lcssa.us-lcssa
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cond.false18.us40: ; preds = %if.end.us50
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%7 = load i32* @f, align 4
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%sext = shl i32 %7, 16
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%phitmp = ashr exact i32 %sext, 16
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br label %if.end.us50
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if.end.us50: ; preds = %cond.false18.us40, %for.cond1.preheader.for.cond1.preheader.split_crit_edge
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%j.1.us36 = phi i32 [ %j.073, %for.cond1.preheader.for.cond1.preheader.split_crit_edge ], [ %phitmp, %cond.false18.us40 ]
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store i32 0, i32* @h, align 4
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br i1 %tobool4, label %cond.false18.us40, label %for.cond1.preheader
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if.end6.us65: ; preds = %if.end6.us65, %for.cond1.preheader.split.for.cond1.preheader.split.split_crit_edge
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store i32 0, i32* @h, align 4
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br label %if.end6.us65
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for.cond25.loopexit.us-lcssa.us-lcssa: ; preds = %for.cond1.preheader.split.for.cond1.preheader.split.split_crit_edge
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store i32 0, i32* @h, align 4
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br label %for.cond1.preheader
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for.end32: ; preds = %entry
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ret void
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}
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