mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-08-23 17:29:19 +00:00
Summary: Looking at r241279, I noticed that UpgradedIntrinsics only gets written to in the following code: if (UpgradeIntrinsicFunction(&F, NewFn)) UpgradedIntrinsics[&F] = NewFn; Looking through UpgradeIntrinsicFunction, we always return false OR NewFn will be set to a different function from our source. This patch pulls the F != NewFn into UpgradeIntrinsicFunction as an assert, and removes the check from callers of UpgradeIntrinsicFunction. Reviewers: rafael, chandlerc Subscribers: llvm-commits-list Differential Revision: http://reviews.llvm.org/D10915 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241369 91177308-0d34-0410-b5e6-96231b3b80d8
814 lines
32 KiB
C++
814 lines
32 KiB
C++
//===-- AutoUpgrade.cpp - Implement auto-upgrade helper functions ---------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements the auto-upgrade helper functions.
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// This is where deprecated IR intrinsics and other IR features are updated to
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// current specifications.
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/IR/AutoUpgrade.h"
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#include "llvm/IR/CFG.h"
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#include "llvm/IR/CallSite.h"
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#include "llvm/IR/Constants.h"
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#include "llvm/IR/DIBuilder.h"
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#include "llvm/IR/DebugInfo.h"
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#include "llvm/IR/DiagnosticInfo.h"
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#include "llvm/IR/Function.h"
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#include "llvm/IR/IRBuilder.h"
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#include "llvm/IR/Instruction.h"
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#include "llvm/IR/IntrinsicInst.h"
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#include "llvm/IR/LLVMContext.h"
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#include "llvm/IR/Module.h"
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#include "llvm/Support/ErrorHandling.h"
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#include <cstring>
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using namespace llvm;
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// Upgrade the declarations of the SSE4.1 functions whose arguments have
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// changed their type from v4f32 to v2i64.
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static bool UpgradeSSE41Function(Function* F, Intrinsic::ID IID,
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Function *&NewFn) {
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// Check whether this is an old version of the function, which received
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// v4f32 arguments.
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Type *Arg0Type = F->getFunctionType()->getParamType(0);
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if (Arg0Type != VectorType::get(Type::getFloatTy(F->getContext()), 4))
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return false;
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// Yes, it's old, replace it with new version.
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F->setName(F->getName() + ".old");
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NewFn = Intrinsic::getDeclaration(F->getParent(), IID);
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return true;
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}
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// Upgrade the declarations of intrinsic functions whose 8-bit immediate mask
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// arguments have changed their type from i32 to i8.
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static bool UpgradeX86IntrinsicsWith8BitMask(Function *F, Intrinsic::ID IID,
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Function *&NewFn) {
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// Check that the last argument is an i32.
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Type *LastArgType = F->getFunctionType()->getParamType(
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F->getFunctionType()->getNumParams() - 1);
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if (!LastArgType->isIntegerTy(32))
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return false;
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// Move this function aside and map down.
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F->setName(F->getName() + ".old");
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NewFn = Intrinsic::getDeclaration(F->getParent(), IID);
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return true;
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}
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static bool UpgradeIntrinsicFunction1(Function *F, Function *&NewFn) {
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assert(F && "Illegal to upgrade a non-existent Function.");
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// Quickly eliminate it, if it's not a candidate.
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StringRef Name = F->getName();
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if (Name.size() <= 8 || !Name.startswith("llvm."))
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return false;
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Name = Name.substr(5); // Strip off "llvm."
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switch (Name[0]) {
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default: break;
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case 'a': {
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if (Name.startswith("arm.neon.vclz")) {
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Type* args[2] = {
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F->arg_begin()->getType(),
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Type::getInt1Ty(F->getContext())
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};
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// Can't use Intrinsic::getDeclaration here as it adds a ".i1" to
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// the end of the name. Change name from llvm.arm.neon.vclz.* to
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// llvm.ctlz.*
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FunctionType* fType = FunctionType::get(F->getReturnType(), args, false);
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NewFn = Function::Create(fType, F->getLinkage(),
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"llvm.ctlz." + Name.substr(14), F->getParent());
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return true;
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}
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if (Name.startswith("arm.neon.vcnt")) {
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NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::ctpop,
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F->arg_begin()->getType());
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return true;
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}
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break;
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}
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case 'c': {
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if (Name.startswith("ctlz.") && F->arg_size() == 1) {
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F->setName(Name + ".old");
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NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::ctlz,
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F->arg_begin()->getType());
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return true;
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}
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if (Name.startswith("cttz.") && F->arg_size() == 1) {
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F->setName(Name + ".old");
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NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::cttz,
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F->arg_begin()->getType());
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return true;
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}
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break;
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}
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case 'o':
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// We only need to change the name to match the mangling including the
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// address space.
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if (F->arg_size() == 2 && Name.startswith("objectsize.")) {
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Type *Tys[2] = { F->getReturnType(), F->arg_begin()->getType() };
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if (F->getName() != Intrinsic::getName(Intrinsic::objectsize, Tys)) {
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F->setName(Name + ".old");
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NewFn = Intrinsic::getDeclaration(F->getParent(),
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Intrinsic::objectsize, Tys);
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return true;
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}
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}
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break;
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case 'x': {
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if (Name.startswith("x86.sse2.pcmpeq.") ||
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Name.startswith("x86.sse2.pcmpgt.") ||
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Name.startswith("x86.avx2.pcmpeq.") ||
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Name.startswith("x86.avx2.pcmpgt.") ||
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Name.startswith("x86.avx.vpermil.") ||
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Name == "x86.avx.vinsertf128.pd.256" ||
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Name == "x86.avx.vinsertf128.ps.256" ||
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Name == "x86.avx.vinsertf128.si.256" ||
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Name == "x86.avx2.vinserti128" ||
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Name == "x86.avx.vextractf128.pd.256" ||
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Name == "x86.avx.vextractf128.ps.256" ||
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Name == "x86.avx.vextractf128.si.256" ||
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Name == "x86.avx2.vextracti128" ||
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Name == "x86.avx.movnt.dq.256" ||
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Name == "x86.avx.movnt.pd.256" ||
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Name == "x86.avx.movnt.ps.256" ||
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Name == "x86.sse42.crc32.64.8" ||
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Name == "x86.avx.vbroadcast.ss" ||
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Name == "x86.avx.vbroadcast.ss.256" ||
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Name == "x86.avx.vbroadcast.sd.256" ||
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Name == "x86.sse2.psll.dq" ||
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Name == "x86.sse2.psrl.dq" ||
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Name == "x86.avx2.psll.dq" ||
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Name == "x86.avx2.psrl.dq" ||
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Name == "x86.sse2.psll.dq.bs" ||
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Name == "x86.sse2.psrl.dq.bs" ||
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Name == "x86.avx2.psll.dq.bs" ||
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Name == "x86.avx2.psrl.dq.bs" ||
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Name == "x86.sse41.pblendw" ||
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Name == "x86.sse41.blendpd" ||
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Name == "x86.sse41.blendps" ||
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Name == "x86.avx.blend.pd.256" ||
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Name == "x86.avx.blend.ps.256" ||
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Name == "x86.avx2.pblendw" ||
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Name == "x86.avx2.pblendd.128" ||
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Name == "x86.avx2.pblendd.256" ||
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Name == "x86.avx2.vbroadcasti128" ||
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(Name.startswith("x86.xop.vpcom") && F->arg_size() == 2)) {
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NewFn = nullptr;
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return true;
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}
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// SSE4.1 ptest functions may have an old signature.
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if (Name.startswith("x86.sse41.ptest")) {
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if (Name == "x86.sse41.ptestc")
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return UpgradeSSE41Function(F, Intrinsic::x86_sse41_ptestc, NewFn);
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if (Name == "x86.sse41.ptestz")
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return UpgradeSSE41Function(F, Intrinsic::x86_sse41_ptestz, NewFn);
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if (Name == "x86.sse41.ptestnzc")
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return UpgradeSSE41Function(F, Intrinsic::x86_sse41_ptestnzc, NewFn);
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}
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// Several blend and other instructions with masks used the wrong number of
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// bits.
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if (Name == "x86.sse41.insertps")
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return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_sse41_insertps,
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NewFn);
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if (Name == "x86.sse41.dppd")
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return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_sse41_dppd,
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NewFn);
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if (Name == "x86.sse41.dpps")
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return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_sse41_dpps,
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NewFn);
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if (Name == "x86.sse41.mpsadbw")
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return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_sse41_mpsadbw,
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NewFn);
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if (Name == "x86.avx.dp.ps.256")
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return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_avx_dp_ps_256,
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NewFn);
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if (Name == "x86.avx2.mpsadbw")
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return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_avx2_mpsadbw,
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NewFn);
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// frcz.ss/sd may need to have an argument dropped
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if (Name.startswith("x86.xop.vfrcz.ss") && F->arg_size() == 2) {
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F->setName(Name + ".old");
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NewFn = Intrinsic::getDeclaration(F->getParent(),
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Intrinsic::x86_xop_vfrcz_ss);
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return true;
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}
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if (Name.startswith("x86.xop.vfrcz.sd") && F->arg_size() == 2) {
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F->setName(Name + ".old");
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NewFn = Intrinsic::getDeclaration(F->getParent(),
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Intrinsic::x86_xop_vfrcz_sd);
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return true;
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}
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// Fix the FMA4 intrinsics to remove the 4
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if (Name.startswith("x86.fma4.")) {
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F->setName("llvm.x86.fma" + Name.substr(8));
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NewFn = F;
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return true;
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}
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break;
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}
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}
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// This may not belong here. This function is effectively being overloaded
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// to both detect an intrinsic which needs upgrading, and to provide the
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// upgraded form of the intrinsic. We should perhaps have two separate
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// functions for this.
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return false;
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}
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bool llvm::UpgradeIntrinsicFunction(Function *F, Function *&NewFn) {
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NewFn = nullptr;
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bool Upgraded = UpgradeIntrinsicFunction1(F, NewFn);
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assert(F != NewFn && "Intrinsic function upgraded to the same function");
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// Upgrade intrinsic attributes. This does not change the function.
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if (NewFn)
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F = NewFn;
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if (Intrinsic::ID id = F->getIntrinsicID())
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F->setAttributes(Intrinsic::getAttributes(F->getContext(), id));
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return Upgraded;
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}
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bool llvm::UpgradeGlobalVariable(GlobalVariable *GV) {
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// Nothing to do yet.
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return false;
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}
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// Handles upgrading SSE2 and AVX2 PSLLDQ intrinsics by converting them
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// to byte shuffles.
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static Value *UpgradeX86PSLLDQIntrinsics(IRBuilder<> &Builder, LLVMContext &C,
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Value *Op, unsigned NumLanes,
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unsigned Shift) {
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// Each lane is 16 bytes.
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unsigned NumElts = NumLanes * 16;
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// Bitcast from a 64-bit element type to a byte element type.
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Op = Builder.CreateBitCast(Op,
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VectorType::get(Type::getInt8Ty(C), NumElts),
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"cast");
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// We'll be shuffling in zeroes.
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Value *Res = ConstantVector::getSplat(NumElts, Builder.getInt8(0));
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// If shift is less than 16, emit a shuffle to move the bytes. Otherwise,
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// we'll just return the zero vector.
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if (Shift < 16) {
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SmallVector<Constant*, 32> Idxs;
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// 256-bit version is split into two 16-byte lanes.
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for (unsigned l = 0; l != NumElts; l += 16)
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for (unsigned i = 0; i != 16; ++i) {
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unsigned Idx = NumElts + i - Shift;
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if (Idx < NumElts)
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Idx -= NumElts - 16; // end of lane, switch operand.
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Idxs.push_back(Builder.getInt32(Idx + l));
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}
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Res = Builder.CreateShuffleVector(Res, Op, ConstantVector::get(Idxs));
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}
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// Bitcast back to a 64-bit element type.
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return Builder.CreateBitCast(Res,
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VectorType::get(Type::getInt64Ty(C), 2*NumLanes),
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"cast");
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}
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// Handles upgrading SSE2 and AVX2 PSRLDQ intrinsics by converting them
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// to byte shuffles.
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static Value *UpgradeX86PSRLDQIntrinsics(IRBuilder<> &Builder, LLVMContext &C,
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Value *Op, unsigned NumLanes,
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unsigned Shift) {
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// Each lane is 16 bytes.
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unsigned NumElts = NumLanes * 16;
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// Bitcast from a 64-bit element type to a byte element type.
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Op = Builder.CreateBitCast(Op,
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VectorType::get(Type::getInt8Ty(C), NumElts),
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"cast");
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// We'll be shuffling in zeroes.
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Value *Res = ConstantVector::getSplat(NumElts, Builder.getInt8(0));
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// If shift is less than 16, emit a shuffle to move the bytes. Otherwise,
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// we'll just return the zero vector.
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if (Shift < 16) {
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SmallVector<Constant*, 32> Idxs;
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// 256-bit version is split into two 16-byte lanes.
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for (unsigned l = 0; l != NumElts; l += 16)
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for (unsigned i = 0; i != 16; ++i) {
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unsigned Idx = i + Shift;
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if (Idx >= 16)
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Idx += NumElts - 16; // end of lane, switch operand.
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Idxs.push_back(Builder.getInt32(Idx + l));
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}
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Res = Builder.CreateShuffleVector(Op, Res, ConstantVector::get(Idxs));
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}
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// Bitcast back to a 64-bit element type.
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return Builder.CreateBitCast(Res,
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VectorType::get(Type::getInt64Ty(C), 2*NumLanes),
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"cast");
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}
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// UpgradeIntrinsicCall - Upgrade a call to an old intrinsic to be a call the
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// upgraded intrinsic. All argument and return casting must be provided in
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// order to seamlessly integrate with existing context.
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void llvm::UpgradeIntrinsicCall(CallInst *CI, Function *NewFn) {
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Function *F = CI->getCalledFunction();
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LLVMContext &C = CI->getContext();
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IRBuilder<> Builder(C);
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Builder.SetInsertPoint(CI->getParent(), CI);
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assert(F && "Intrinsic call is not direct?");
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if (!NewFn) {
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// Get the Function's name.
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StringRef Name = F->getName();
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Value *Rep;
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// Upgrade packed integer vector compares intrinsics to compare instructions
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if (Name.startswith("llvm.x86.sse2.pcmpeq.") ||
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Name.startswith("llvm.x86.avx2.pcmpeq.")) {
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Rep = Builder.CreateICmpEQ(CI->getArgOperand(0), CI->getArgOperand(1),
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"pcmpeq");
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// need to sign extend since icmp returns vector of i1
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Rep = Builder.CreateSExt(Rep, CI->getType(), "");
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} else if (Name.startswith("llvm.x86.sse2.pcmpgt.") ||
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Name.startswith("llvm.x86.avx2.pcmpgt.")) {
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Rep = Builder.CreateICmpSGT(CI->getArgOperand(0), CI->getArgOperand(1),
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"pcmpgt");
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// need to sign extend since icmp returns vector of i1
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Rep = Builder.CreateSExt(Rep, CI->getType(), "");
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} else if (Name == "llvm.x86.avx.movnt.dq.256" ||
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Name == "llvm.x86.avx.movnt.ps.256" ||
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Name == "llvm.x86.avx.movnt.pd.256") {
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IRBuilder<> Builder(C);
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Builder.SetInsertPoint(CI->getParent(), CI);
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Module *M = F->getParent();
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SmallVector<Metadata *, 1> Elts;
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Elts.push_back(
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ConstantAsMetadata::get(ConstantInt::get(Type::getInt32Ty(C), 1)));
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MDNode *Node = MDNode::get(C, Elts);
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Value *Arg0 = CI->getArgOperand(0);
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Value *Arg1 = CI->getArgOperand(1);
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// Convert the type of the pointer to a pointer to the stored type.
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Value *BC = Builder.CreateBitCast(Arg0,
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PointerType::getUnqual(Arg1->getType()),
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"cast");
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StoreInst *SI = Builder.CreateStore(Arg1, BC);
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SI->setMetadata(M->getMDKindID("nontemporal"), Node);
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SI->setAlignment(16);
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// Remove intrinsic.
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CI->eraseFromParent();
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return;
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} else if (Name.startswith("llvm.x86.xop.vpcom")) {
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Intrinsic::ID intID;
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if (Name.endswith("ub"))
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intID = Intrinsic::x86_xop_vpcomub;
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else if (Name.endswith("uw"))
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intID = Intrinsic::x86_xop_vpcomuw;
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else if (Name.endswith("ud"))
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intID = Intrinsic::x86_xop_vpcomud;
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else if (Name.endswith("uq"))
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intID = Intrinsic::x86_xop_vpcomuq;
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else if (Name.endswith("b"))
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intID = Intrinsic::x86_xop_vpcomb;
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else if (Name.endswith("w"))
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intID = Intrinsic::x86_xop_vpcomw;
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else if (Name.endswith("d"))
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intID = Intrinsic::x86_xop_vpcomd;
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else if (Name.endswith("q"))
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intID = Intrinsic::x86_xop_vpcomq;
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else
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llvm_unreachable("Unknown suffix");
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Name = Name.substr(18); // strip off "llvm.x86.xop.vpcom"
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unsigned Imm;
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if (Name.startswith("lt"))
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Imm = 0;
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else if (Name.startswith("le"))
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Imm = 1;
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else if (Name.startswith("gt"))
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Imm = 2;
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else if (Name.startswith("ge"))
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Imm = 3;
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else if (Name.startswith("eq"))
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Imm = 4;
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else if (Name.startswith("ne"))
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Imm = 5;
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else if (Name.startswith("false"))
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Imm = 6;
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else if (Name.startswith("true"))
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Imm = 7;
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else
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llvm_unreachable("Unknown condition");
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Function *VPCOM = Intrinsic::getDeclaration(F->getParent(), intID);
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Rep =
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Builder.CreateCall(VPCOM, {CI->getArgOperand(0), CI->getArgOperand(1),
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Builder.getInt8(Imm)});
|
|
} else if (Name == "llvm.x86.sse42.crc32.64.8") {
|
|
Function *CRC32 = Intrinsic::getDeclaration(F->getParent(),
|
|
Intrinsic::x86_sse42_crc32_32_8);
|
|
Value *Trunc0 = Builder.CreateTrunc(CI->getArgOperand(0), Type::getInt32Ty(C));
|
|
Rep = Builder.CreateCall(CRC32, {Trunc0, CI->getArgOperand(1)});
|
|
Rep = Builder.CreateZExt(Rep, CI->getType(), "");
|
|
} else if (Name.startswith("llvm.x86.avx.vbroadcast")) {
|
|
// Replace broadcasts with a series of insertelements.
|
|
Type *VecTy = CI->getType();
|
|
Type *EltTy = VecTy->getVectorElementType();
|
|
unsigned EltNum = VecTy->getVectorNumElements();
|
|
Value *Cast = Builder.CreateBitCast(CI->getArgOperand(0),
|
|
EltTy->getPointerTo());
|
|
Value *Load = Builder.CreateLoad(EltTy, Cast);
|
|
Type *I32Ty = Type::getInt32Ty(C);
|
|
Rep = UndefValue::get(VecTy);
|
|
for (unsigned I = 0; I < EltNum; ++I)
|
|
Rep = Builder.CreateInsertElement(Rep, Load,
|
|
ConstantInt::get(I32Ty, I));
|
|
} else if (Name == "llvm.x86.avx2.vbroadcasti128") {
|
|
// Replace vbroadcasts with a vector shuffle.
|
|
Type *VT = VectorType::get(Type::getInt64Ty(C), 2);
|
|
Value *Op = Builder.CreatePointerCast(CI->getArgOperand(0),
|
|
PointerType::getUnqual(VT));
|
|
Value *Load = Builder.CreateLoad(VT, Op);
|
|
const int Idxs[4] = { 0, 1, 0, 1 };
|
|
Rep = Builder.CreateShuffleVector(Load, UndefValue::get(Load->getType()),
|
|
Idxs);
|
|
} else if (Name == "llvm.x86.sse2.psll.dq") {
|
|
// 128-bit shift left specified in bits.
|
|
unsigned Shift = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue();
|
|
Rep = UpgradeX86PSLLDQIntrinsics(Builder, C, CI->getArgOperand(0), 1,
|
|
Shift / 8); // Shift is in bits.
|
|
} else if (Name == "llvm.x86.sse2.psrl.dq") {
|
|
// 128-bit shift right specified in bits.
|
|
unsigned Shift = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue();
|
|
Rep = UpgradeX86PSRLDQIntrinsics(Builder, C, CI->getArgOperand(0), 1,
|
|
Shift / 8); // Shift is in bits.
|
|
} else if (Name == "llvm.x86.avx2.psll.dq") {
|
|
// 256-bit shift left specified in bits.
|
|
unsigned Shift = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue();
|
|
Rep = UpgradeX86PSLLDQIntrinsics(Builder, C, CI->getArgOperand(0), 2,
|
|
Shift / 8); // Shift is in bits.
|
|
} else if (Name == "llvm.x86.avx2.psrl.dq") {
|
|
// 256-bit shift right specified in bits.
|
|
unsigned Shift = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue();
|
|
Rep = UpgradeX86PSRLDQIntrinsics(Builder, C, CI->getArgOperand(0), 2,
|
|
Shift / 8); // Shift is in bits.
|
|
} else if (Name == "llvm.x86.sse2.psll.dq.bs") {
|
|
// 128-bit shift left specified in bytes.
|
|
unsigned Shift = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue();
|
|
Rep = UpgradeX86PSLLDQIntrinsics(Builder, C, CI->getArgOperand(0), 1,
|
|
Shift);
|
|
} else if (Name == "llvm.x86.sse2.psrl.dq.bs") {
|
|
// 128-bit shift right specified in bytes.
|
|
unsigned Shift = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue();
|
|
Rep = UpgradeX86PSRLDQIntrinsics(Builder, C, CI->getArgOperand(0), 1,
|
|
Shift);
|
|
} else if (Name == "llvm.x86.avx2.psll.dq.bs") {
|
|
// 256-bit shift left specified in bytes.
|
|
unsigned Shift = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue();
|
|
Rep = UpgradeX86PSLLDQIntrinsics(Builder, C, CI->getArgOperand(0), 2,
|
|
Shift);
|
|
} else if (Name == "llvm.x86.avx2.psrl.dq.bs") {
|
|
// 256-bit shift right specified in bytes.
|
|
unsigned Shift = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue();
|
|
Rep = UpgradeX86PSRLDQIntrinsics(Builder, C, CI->getArgOperand(0), 2,
|
|
Shift);
|
|
} else if (Name == "llvm.x86.sse41.pblendw" ||
|
|
Name == "llvm.x86.sse41.blendpd" ||
|
|
Name == "llvm.x86.sse41.blendps" ||
|
|
Name == "llvm.x86.avx.blend.pd.256" ||
|
|
Name == "llvm.x86.avx.blend.ps.256" ||
|
|
Name == "llvm.x86.avx2.pblendw" ||
|
|
Name == "llvm.x86.avx2.pblendd.128" ||
|
|
Name == "llvm.x86.avx2.pblendd.256") {
|
|
Value *Op0 = CI->getArgOperand(0);
|
|
Value *Op1 = CI->getArgOperand(1);
|
|
unsigned Imm = cast <ConstantInt>(CI->getArgOperand(2))->getZExtValue();
|
|
VectorType *VecTy = cast<VectorType>(CI->getType());
|
|
unsigned NumElts = VecTy->getNumElements();
|
|
|
|
SmallVector<Constant*, 16> Idxs;
|
|
for (unsigned i = 0; i != NumElts; ++i) {
|
|
unsigned Idx = ((Imm >> (i%8)) & 1) ? i + NumElts : i;
|
|
Idxs.push_back(Builder.getInt32(Idx));
|
|
}
|
|
|
|
Rep = Builder.CreateShuffleVector(Op0, Op1, ConstantVector::get(Idxs));
|
|
} else if (Name == "llvm.x86.avx.vinsertf128.pd.256" ||
|
|
Name == "llvm.x86.avx.vinsertf128.ps.256" ||
|
|
Name == "llvm.x86.avx.vinsertf128.si.256" ||
|
|
Name == "llvm.x86.avx2.vinserti128") {
|
|
Value *Op0 = CI->getArgOperand(0);
|
|
Value *Op1 = CI->getArgOperand(1);
|
|
unsigned Imm = cast<ConstantInt>(CI->getArgOperand(2))->getZExtValue();
|
|
VectorType *VecTy = cast<VectorType>(CI->getType());
|
|
unsigned NumElts = VecTy->getNumElements();
|
|
|
|
// Mask off the high bits of the immediate value; hardware ignores those.
|
|
Imm = Imm & 1;
|
|
|
|
// Extend the second operand into a vector that is twice as big.
|
|
Value *UndefV = UndefValue::get(Op1->getType());
|
|
SmallVector<Constant*, 8> Idxs;
|
|
for (unsigned i = 0; i != NumElts; ++i) {
|
|
Idxs.push_back(Builder.getInt32(i));
|
|
}
|
|
Rep = Builder.CreateShuffleVector(Op1, UndefV, ConstantVector::get(Idxs));
|
|
|
|
// Insert the second operand into the first operand.
|
|
|
|
// Note that there is no guarantee that instruction lowering will actually
|
|
// produce a vinsertf128 instruction for the created shuffles. In
|
|
// particular, the 0 immediate case involves no lane changes, so it can
|
|
// be handled as a blend.
|
|
|
|
// Example of shuffle mask for 32-bit elements:
|
|
// Imm = 1 <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 10, i32 11>
|
|
// Imm = 0 <i32 8, i32 9, i32 10, i32 11, i32 4, i32 5, i32 6, i32 7 >
|
|
|
|
SmallVector<Constant*, 8> Idxs2;
|
|
// The low half of the result is either the low half of the 1st operand
|
|
// or the low half of the 2nd operand (the inserted vector).
|
|
for (unsigned i = 0; i != NumElts / 2; ++i) {
|
|
unsigned Idx = Imm ? i : (i + NumElts);
|
|
Idxs2.push_back(Builder.getInt32(Idx));
|
|
}
|
|
// The high half of the result is either the low half of the 2nd operand
|
|
// (the inserted vector) or the high half of the 1st operand.
|
|
for (unsigned i = NumElts / 2; i != NumElts; ++i) {
|
|
unsigned Idx = Imm ? (i + NumElts / 2) : i;
|
|
Idxs2.push_back(Builder.getInt32(Idx));
|
|
}
|
|
Rep = Builder.CreateShuffleVector(Op0, Rep, ConstantVector::get(Idxs2));
|
|
} else if (Name == "llvm.x86.avx.vextractf128.pd.256" ||
|
|
Name == "llvm.x86.avx.vextractf128.ps.256" ||
|
|
Name == "llvm.x86.avx.vextractf128.si.256" ||
|
|
Name == "llvm.x86.avx2.vextracti128") {
|
|
Value *Op0 = CI->getArgOperand(0);
|
|
unsigned Imm = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue();
|
|
VectorType *VecTy = cast<VectorType>(CI->getType());
|
|
unsigned NumElts = VecTy->getNumElements();
|
|
|
|
// Mask off the high bits of the immediate value; hardware ignores those.
|
|
Imm = Imm & 1;
|
|
|
|
// Get indexes for either the high half or low half of the input vector.
|
|
SmallVector<Constant*, 4> Idxs(NumElts);
|
|
for (unsigned i = 0; i != NumElts; ++i) {
|
|
unsigned Idx = Imm ? (i + NumElts) : i;
|
|
Idxs[i] = Builder.getInt32(Idx);
|
|
}
|
|
|
|
Value *UndefV = UndefValue::get(Op0->getType());
|
|
Rep = Builder.CreateShuffleVector(Op0, UndefV, ConstantVector::get(Idxs));
|
|
} else {
|
|
bool PD128 = false, PD256 = false, PS128 = false, PS256 = false;
|
|
if (Name == "llvm.x86.avx.vpermil.pd.256")
|
|
PD256 = true;
|
|
else if (Name == "llvm.x86.avx.vpermil.pd")
|
|
PD128 = true;
|
|
else if (Name == "llvm.x86.avx.vpermil.ps.256")
|
|
PS256 = true;
|
|
else if (Name == "llvm.x86.avx.vpermil.ps")
|
|
PS128 = true;
|
|
|
|
if (PD256 || PD128 || PS256 || PS128) {
|
|
Value *Op0 = CI->getArgOperand(0);
|
|
unsigned Imm = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue();
|
|
SmallVector<Constant*, 8> Idxs;
|
|
|
|
if (PD128)
|
|
for (unsigned i = 0; i != 2; ++i)
|
|
Idxs.push_back(Builder.getInt32((Imm >> i) & 0x1));
|
|
else if (PD256)
|
|
for (unsigned l = 0; l != 4; l+=2)
|
|
for (unsigned i = 0; i != 2; ++i)
|
|
Idxs.push_back(Builder.getInt32(((Imm >> (l+i)) & 0x1) + l));
|
|
else if (PS128)
|
|
for (unsigned i = 0; i != 4; ++i)
|
|
Idxs.push_back(Builder.getInt32((Imm >> (2 * i)) & 0x3));
|
|
else if (PS256)
|
|
for (unsigned l = 0; l != 8; l+=4)
|
|
for (unsigned i = 0; i != 4; ++i)
|
|
Idxs.push_back(Builder.getInt32(((Imm >> (2 * i)) & 0x3) + l));
|
|
else
|
|
llvm_unreachable("Unexpected function");
|
|
|
|
Rep = Builder.CreateShuffleVector(Op0, Op0, ConstantVector::get(Idxs));
|
|
} else {
|
|
llvm_unreachable("Unknown function for CallInst upgrade.");
|
|
}
|
|
}
|
|
|
|
CI->replaceAllUsesWith(Rep);
|
|
CI->eraseFromParent();
|
|
return;
|
|
}
|
|
|
|
std::string Name = CI->getName();
|
|
if (!Name.empty())
|
|
CI->setName(Name + ".old");
|
|
|
|
switch (NewFn->getIntrinsicID()) {
|
|
default:
|
|
llvm_unreachable("Unknown function for CallInst upgrade.");
|
|
|
|
case Intrinsic::ctlz:
|
|
case Intrinsic::cttz:
|
|
assert(CI->getNumArgOperands() == 1 &&
|
|
"Mismatch between function args and call args");
|
|
CI->replaceAllUsesWith(Builder.CreateCall(
|
|
NewFn, {CI->getArgOperand(0), Builder.getFalse()}, Name));
|
|
CI->eraseFromParent();
|
|
return;
|
|
|
|
case Intrinsic::objectsize:
|
|
CI->replaceAllUsesWith(Builder.CreateCall(
|
|
NewFn, {CI->getArgOperand(0), CI->getArgOperand(1)}, Name));
|
|
CI->eraseFromParent();
|
|
return;
|
|
|
|
case Intrinsic::ctpop: {
|
|
CI->replaceAllUsesWith(Builder.CreateCall(NewFn, {CI->getArgOperand(0)}));
|
|
CI->eraseFromParent();
|
|
return;
|
|
}
|
|
|
|
case Intrinsic::x86_xop_vfrcz_ss:
|
|
case Intrinsic::x86_xop_vfrcz_sd:
|
|
CI->replaceAllUsesWith(
|
|
Builder.CreateCall(NewFn, {CI->getArgOperand(1)}, Name));
|
|
CI->eraseFromParent();
|
|
return;
|
|
|
|
case Intrinsic::x86_sse41_ptestc:
|
|
case Intrinsic::x86_sse41_ptestz:
|
|
case Intrinsic::x86_sse41_ptestnzc: {
|
|
// The arguments for these intrinsics used to be v4f32, and changed
|
|
// to v2i64. This is purely a nop, since those are bitwise intrinsics.
|
|
// So, the only thing required is a bitcast for both arguments.
|
|
// First, check the arguments have the old type.
|
|
Value *Arg0 = CI->getArgOperand(0);
|
|
if (Arg0->getType() != VectorType::get(Type::getFloatTy(C), 4))
|
|
return;
|
|
|
|
// Old intrinsic, add bitcasts
|
|
Value *Arg1 = CI->getArgOperand(1);
|
|
|
|
Type *NewVecTy = VectorType::get(Type::getInt64Ty(C), 2);
|
|
|
|
Value *BC0 = Builder.CreateBitCast(Arg0, NewVecTy, "cast");
|
|
Value *BC1 = Builder.CreateBitCast(Arg1, NewVecTy, "cast");
|
|
|
|
CallInst *NewCall = Builder.CreateCall(NewFn, {BC0, BC1}, Name);
|
|
CI->replaceAllUsesWith(NewCall);
|
|
CI->eraseFromParent();
|
|
return;
|
|
}
|
|
|
|
case Intrinsic::x86_sse41_insertps:
|
|
case Intrinsic::x86_sse41_dppd:
|
|
case Intrinsic::x86_sse41_dpps:
|
|
case Intrinsic::x86_sse41_mpsadbw:
|
|
case Intrinsic::x86_avx_dp_ps_256:
|
|
case Intrinsic::x86_avx2_mpsadbw: {
|
|
// Need to truncate the last argument from i32 to i8 -- this argument models
|
|
// an inherently 8-bit immediate operand to these x86 instructions.
|
|
SmallVector<Value *, 4> Args(CI->arg_operands().begin(),
|
|
CI->arg_operands().end());
|
|
|
|
// Replace the last argument with a trunc.
|
|
Args.back() = Builder.CreateTrunc(Args.back(), Type::getInt8Ty(C), "trunc");
|
|
|
|
CallInst *NewCall = Builder.CreateCall(NewFn, Args);
|
|
CI->replaceAllUsesWith(NewCall);
|
|
CI->eraseFromParent();
|
|
return;
|
|
}
|
|
}
|
|
}
|
|
|
|
// This tests each Function to determine if it needs upgrading. When we find
|
|
// one we are interested in, we then upgrade all calls to reflect the new
|
|
// function.
|
|
void llvm::UpgradeCallsToIntrinsic(Function* F) {
|
|
assert(F && "Illegal attempt to upgrade a non-existent intrinsic.");
|
|
|
|
// Upgrade the function and check if it is a totaly new function.
|
|
Function *NewFn;
|
|
if (UpgradeIntrinsicFunction(F, NewFn)) {
|
|
// Replace all uses to the old function with the new one if necessary.
|
|
for (Value::user_iterator UI = F->user_begin(), UE = F->user_end();
|
|
UI != UE;) {
|
|
if (CallInst *CI = dyn_cast<CallInst>(*UI++))
|
|
UpgradeIntrinsicCall(CI, NewFn);
|
|
}
|
|
// Remove old function, no longer used, from the module.
|
|
F->eraseFromParent();
|
|
}
|
|
}
|
|
|
|
void llvm::UpgradeInstWithTBAATag(Instruction *I) {
|
|
MDNode *MD = I->getMetadata(LLVMContext::MD_tbaa);
|
|
assert(MD && "UpgradeInstWithTBAATag should have a TBAA tag");
|
|
// Check if the tag uses struct-path aware TBAA format.
|
|
if (isa<MDNode>(MD->getOperand(0)) && MD->getNumOperands() >= 3)
|
|
return;
|
|
|
|
if (MD->getNumOperands() == 3) {
|
|
Metadata *Elts[] = {MD->getOperand(0), MD->getOperand(1)};
|
|
MDNode *ScalarType = MDNode::get(I->getContext(), Elts);
|
|
// Create a MDNode <ScalarType, ScalarType, offset 0, const>
|
|
Metadata *Elts2[] = {ScalarType, ScalarType,
|
|
ConstantAsMetadata::get(Constant::getNullValue(
|
|
Type::getInt64Ty(I->getContext()))),
|
|
MD->getOperand(2)};
|
|
I->setMetadata(LLVMContext::MD_tbaa, MDNode::get(I->getContext(), Elts2));
|
|
} else {
|
|
// Create a MDNode <MD, MD, offset 0>
|
|
Metadata *Elts[] = {MD, MD, ConstantAsMetadata::get(Constant::getNullValue(
|
|
Type::getInt64Ty(I->getContext())))};
|
|
I->setMetadata(LLVMContext::MD_tbaa, MDNode::get(I->getContext(), Elts));
|
|
}
|
|
}
|
|
|
|
Instruction *llvm::UpgradeBitCastInst(unsigned Opc, Value *V, Type *DestTy,
|
|
Instruction *&Temp) {
|
|
if (Opc != Instruction::BitCast)
|
|
return nullptr;
|
|
|
|
Temp = nullptr;
|
|
Type *SrcTy = V->getType();
|
|
if (SrcTy->isPtrOrPtrVectorTy() && DestTy->isPtrOrPtrVectorTy() &&
|
|
SrcTy->getPointerAddressSpace() != DestTy->getPointerAddressSpace()) {
|
|
LLVMContext &Context = V->getContext();
|
|
|
|
// We have no information about target data layout, so we assume that
|
|
// the maximum pointer size is 64bit.
|
|
Type *MidTy = Type::getInt64Ty(Context);
|
|
Temp = CastInst::Create(Instruction::PtrToInt, V, MidTy);
|
|
|
|
return CastInst::Create(Instruction::IntToPtr, Temp, DestTy);
|
|
}
|
|
|
|
return nullptr;
|
|
}
|
|
|
|
Value *llvm::UpgradeBitCastExpr(unsigned Opc, Constant *C, Type *DestTy) {
|
|
if (Opc != Instruction::BitCast)
|
|
return nullptr;
|
|
|
|
Type *SrcTy = C->getType();
|
|
if (SrcTy->isPtrOrPtrVectorTy() && DestTy->isPtrOrPtrVectorTy() &&
|
|
SrcTy->getPointerAddressSpace() != DestTy->getPointerAddressSpace()) {
|
|
LLVMContext &Context = C->getContext();
|
|
|
|
// We have no information about target data layout, so we assume that
|
|
// the maximum pointer size is 64bit.
|
|
Type *MidTy = Type::getInt64Ty(Context);
|
|
|
|
return ConstantExpr::getIntToPtr(ConstantExpr::getPtrToInt(C, MidTy),
|
|
DestTy);
|
|
}
|
|
|
|
return nullptr;
|
|
}
|
|
|
|
/// Check the debug info version number, if it is out-dated, drop the debug
|
|
/// info. Return true if module is modified.
|
|
bool llvm::UpgradeDebugInfo(Module &M) {
|
|
unsigned Version = getDebugMetadataVersionFromModule(M);
|
|
if (Version == DEBUG_METADATA_VERSION)
|
|
return false;
|
|
|
|
bool RetCode = StripDebugInfo(M);
|
|
if (RetCode) {
|
|
DiagnosticInfoDebugMetadataVersion DiagVersion(M, Version);
|
|
M.getContext().diagnose(DiagVersion);
|
|
}
|
|
return RetCode;
|
|
}
|
|
|
|
void llvm::UpgradeMDStringConstant(std::string &String) {
|
|
const std::string OldPrefix = "llvm.vectorizer.";
|
|
if (String == "llvm.vectorizer.unroll") {
|
|
String = "llvm.loop.interleave.count";
|
|
} else if (String.find(OldPrefix) == 0) {
|
|
String.replace(0, OldPrefix.size(), "llvm.loop.vectorize.");
|
|
}
|
|
}
|