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5a9cd4d44e
a cache of assumptions for a single function, and an immutable pass that manages those caches. The motivation for this change is two fold. Immutable analyses are really hacks around the current pass manager design and don't exist in the new design. This is usually OK, but it requires that the core logic of an immutable pass be reasonably partitioned off from the pass logic. This change does precisely that. As a consequence it also paves the way for the *many* utility functions that deal in the assumptions to live in both pass manager worlds by creating an separate non-pass object with its own independent API that they all rely on. Now, the only bits of the system that deal with the actual pass mechanics are those that actually need to deal with the pass mechanics. Once this separation is made, several simplifications become pretty obvious in the assumption cache itself. Rather than using a set and callback value handles, it can just be a vector of weak value handles. The callers can easily skip the handles that are null, and eventually we can wrap all of this up behind a filter iterator. For now, this adds boiler plate to the various passes, but this kind of boiler plate will end up making it possible to port these passes to the new pass manager, and so it will end up factored away pretty reasonably. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225131 91177308-0d34-0410-b5e6-96231b3b80d8
51 lines
1.7 KiB
C++
51 lines
1.7 KiB
C++
//===- PromoteMemToReg.h - Promote Allocas to Scalars -----------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file exposes an interface to promote alloca instructions to SSA
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// registers, by using the SSA construction algorithm.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_TRANSFORMS_UTILS_PROMOTEMEMTOREG_H
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#define LLVM_TRANSFORMS_UTILS_PROMOTEMEMTOREG_H
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#include "llvm/ADT/ArrayRef.h"
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namespace llvm {
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class AllocaInst;
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class DominatorTree;
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class AliasSetTracker;
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class AssumptionCache;
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/// \brief Return true if this alloca is legal for promotion.
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///
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/// This is true if there are only loads, stores, and lifetime markers
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/// (transitively) using this alloca. This also enforces that there is only
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/// ever one layer of bitcasts or GEPs between the alloca and the lifetime
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/// markers.
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bool isAllocaPromotable(const AllocaInst *AI);
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/// \brief Promote the specified list of alloca instructions into scalar
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/// registers, inserting PHI nodes as appropriate.
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///
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/// This function makes use of DominanceFrontier information. This function
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/// does not modify the CFG of the function at all. All allocas must be from
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/// the same function.
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///
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/// If AST is specified, the specified tracker is updated to reflect changes
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/// made to the IR.
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void PromoteMemToReg(ArrayRef<AllocaInst *> Allocas, DominatorTree &DT,
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AliasSetTracker *AST = nullptr,
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AssumptionCache *AC = nullptr);
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} // End llvm namespace
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#endif
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