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d40d03e1bd
(OP (trunc x), (trunc y)) -> (trunc (OP x, y)) Unfortunately this simple change causes dag combine to infinite looping. The problem is the shrink demanded ops optimization tend to canonicalize expressions in the opposite manner. That is badness. This patch disable those optimizations in dag combine but instead it is done as a late pass in sdisel. This also exposes some deficiencies in dag combine and x86 setcc / brcond lowering. Teach them to look pass ISD::TRUNCATE in various places. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92849 91177308-0d34-0410-b5e6-96231b3b80d8 |
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2009-08-04-LowerExtract-Live.ll | ||
2009-08-11-RegScavenger-CSR.ll | ||
2009-08-15-LiveIn-SubReg.ll | ||
2009-08-15-MissingDead.ll | ||
2009-08-15-SetCC-Undef.ll | ||
add-overflow.ll | ||
add.ll | ||
addsub-i128.ll | ||
basic-i1.ll | ||
basic-i8.ll | ||
basic-i16.ll | ||
basic-i32.ll | ||
basic-i64.ll | ||
basictest.ll | ||
burg.ll | ||
cmp64.ll | ||
cmp-small-imm.ll | ||
ct32.ll | ||
ct64.ll | ||
ctlz16.ll | ||
ctlz64.ll | ||
ctpop16.ll | ||
cttz16.ll | ||
cycles.ll | ||
dg.exp | ||
double-cast.ll | ||
frameindex.ll | ||
i1mem.ll | ||
i1ops.ll | ||
i8mem.ll | ||
i17mem.ll | ||
i56param.ll | ||
i216mem.ll | ||
i248mem.ll | ||
i256mem.ll | ||
i256param.ll | ||
inline-asm.ll | ||
int-setcc.ll | ||
invalid-apint.ll | ||
jumptable.ll | ||
large-switch.ll | ||
load-i16.ll | ||
logic-i16.ll | ||
many-args.ll | ||
mulhu.ll | ||
printf2.ll | ||
printf.ll | ||
promote-logic.ll | ||
promote-setcc.ll | ||
sdiv.ll | ||
simple-select.ll | ||
switch2.ll | ||
switch.ll | ||
sync-intr.ll |