mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2025-01-07 11:33:44 +00:00
330e5f16d1
Summary: With this change we are able to realign the stack dynamically, whenever it contains objects with alignment requirements that are larger than the alignment specified from the given ABI. We have to use the $fp register as the frame pointer when we perform dynamic stack realignment. In complex stack frames, with variably-sized objects, we reserve additionally the callee-saved register $s7 as the base pointer in order to reference locals. Reviewers: dsanders Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D8633 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238829 91177308-0d34-0410-b5e6-96231b3b80d8
79 lines
2.5 KiB
C++
79 lines
2.5 KiB
C++
//===---- MipsABIInfo.h - Information about MIPS ABI's --------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_MIPS_MCTARGETDESC_MIPSABIINFO_H
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#define LLVM_LIB_TARGET_MIPS_MCTARGETDESC_MIPSABIINFO_H
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#include "llvm/ADT/ArrayRef.h"
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#include "llvm/ADT/Triple.h"
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#include "llvm/IR/CallingConv.h"
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#include "llvm/MC/MCRegisterInfo.h"
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namespace llvm {
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class MCTargetOptions;
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class StringRef;
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class TargetRegisterClass;
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class MipsABIInfo {
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public:
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enum class ABI { Unknown, O32, N32, N64, EABI };
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protected:
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ABI ThisABI;
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public:
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MipsABIInfo(ABI ThisABI) : ThisABI(ThisABI) {}
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static MipsABIInfo Unknown() { return MipsABIInfo(ABI::Unknown); }
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static MipsABIInfo O32() { return MipsABIInfo(ABI::O32); }
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static MipsABIInfo N32() { return MipsABIInfo(ABI::N32); }
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static MipsABIInfo N64() { return MipsABIInfo(ABI::N64); }
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static MipsABIInfo EABI() { return MipsABIInfo(ABI::EABI); }
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static MipsABIInfo computeTargetABI(Triple TT, StringRef CPU,
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const MCTargetOptions &Options);
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bool IsKnown() const { return ThisABI != ABI::Unknown; }
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bool IsO32() const { return ThisABI == ABI::O32; }
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bool IsN32() const { return ThisABI == ABI::N32; }
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bool IsN64() const { return ThisABI == ABI::N64; }
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bool IsEABI() const { return ThisABI == ABI::EABI; }
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ABI GetEnumValue() const { return ThisABI; }
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/// The registers to use for byval arguments.
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const ArrayRef<MCPhysReg> GetByValArgRegs() const;
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/// The registers to use for the variable argument list.
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const ArrayRef<MCPhysReg> GetVarArgRegs() const;
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/// Obtain the size of the area allocated by the callee for arguments.
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/// CallingConv::FastCall affects the value for O32.
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unsigned GetCalleeAllocdArgSizeInBytes(CallingConv::ID CC) const;
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/// Ordering of ABI's
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/// MipsGenSubtargetInfo.inc will use this to resolve conflicts when given
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/// multiple ABI options.
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bool operator<(const MipsABIInfo Other) const {
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return ThisABI < Other.GetEnumValue();
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}
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unsigned GetStackPtr() const;
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unsigned GetFramePtr() const;
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unsigned GetBasePtr() const;
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unsigned GetNullPtr() const;
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unsigned GetPtrAdduOp() const;
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unsigned GetPtrAddiuOp() const;
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inline bool ArePtrs64bit() const { return IsN64(); }
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unsigned GetEhDataReg(unsigned I) const;
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};
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}
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#endif
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