mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-07-27 13:29:50 +00:00
d275e025d2
There are some operands which can take either immediates or registers and we were previously using different register class to distinguish between operands that could take immediates and those that could not. This patch switches to using RegisterOperands which should simplify the backend by reducing the number of register classes and also make it easier to implement the assembler. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225662 91177308-0d34-0410-b5e6-96231b3b80d8
127 lines
4.4 KiB
LLVM
127 lines
4.4 KiB
LLVM
; RUN: llc -march=amdgcn -mcpu=verde -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
|
|
; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
|
|
|
|
|
|
declare i32 @llvm.r600.read.tidig.x() readnone
|
|
|
|
; FUNC-LABEL: {{^}}test_sub_i32:
|
|
; EG: SUB_INT {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
|
|
|
|
; SI: v_subrev_i32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}}
|
|
define void @test_sub_i32(i32 addrspace(1)* %out, i32 addrspace(1)* %in) {
|
|
%b_ptr = getelementptr i32 addrspace(1)* %in, i32 1
|
|
%a = load i32 addrspace(1)* %in
|
|
%b = load i32 addrspace(1)* %b_ptr
|
|
%result = sub i32 %a, %b
|
|
store i32 %result, i32 addrspace(1)* %out
|
|
ret void
|
|
}
|
|
|
|
|
|
; FUNC-LABEL: {{^}}test_sub_v2i32:
|
|
; EG: SUB_INT {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
|
|
; EG: SUB_INT {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
|
|
|
|
; SI: v_sub_i32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}}
|
|
; SI: v_sub_i32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}}
|
|
|
|
define void @test_sub_v2i32(<2 x i32> addrspace(1)* %out, <2 x i32> addrspace(1)* %in) {
|
|
%b_ptr = getelementptr <2 x i32> addrspace(1)* %in, i32 1
|
|
%a = load <2 x i32> addrspace(1) * %in
|
|
%b = load <2 x i32> addrspace(1) * %b_ptr
|
|
%result = sub <2 x i32> %a, %b
|
|
store <2 x i32> %result, <2 x i32> addrspace(1)* %out
|
|
ret void
|
|
}
|
|
|
|
; FUNC-LABEL: {{^}}test_sub_v4i32:
|
|
; EG: SUB_INT {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
|
|
; EG: SUB_INT {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
|
|
; EG: SUB_INT {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
|
|
; EG: SUB_INT {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
|
|
|
|
; SI: v_sub_i32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}}
|
|
; SI: v_sub_i32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}}
|
|
; SI: v_sub_i32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}}
|
|
; SI: v_sub_i32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}}
|
|
|
|
define void @test_sub_v4i32(<4 x i32> addrspace(1)* %out, <4 x i32> addrspace(1)* %in) {
|
|
%b_ptr = getelementptr <4 x i32> addrspace(1)* %in, i32 1
|
|
%a = load <4 x i32> addrspace(1) * %in
|
|
%b = load <4 x i32> addrspace(1) * %b_ptr
|
|
%result = sub <4 x i32> %a, %b
|
|
store <4 x i32> %result, <4 x i32> addrspace(1)* %out
|
|
ret void
|
|
}
|
|
|
|
; FUNC-LABEL: {{^}}s_sub_i64:
|
|
; SI: s_sub_u32
|
|
; SI: s_subb_u32
|
|
|
|
; EG-DAG: SETGE_UINT
|
|
; EG-DAG: CNDE_INT
|
|
; EG-DAG: SUB_INT
|
|
; EG-DAG: SUB_INT
|
|
; EG-DAG: SUB_INT
|
|
define void @s_sub_i64(i64 addrspace(1)* noalias %out, i64 %a, i64 %b) nounwind {
|
|
%result = sub i64 %a, %b
|
|
store i64 %result, i64 addrspace(1)* %out, align 8
|
|
ret void
|
|
}
|
|
|
|
; FUNC-LABEL: {{^}}v_sub_i64:
|
|
; SI: v_sub_i32_e32
|
|
; SI: v_subb_u32_e32
|
|
|
|
; EG-DAG: SETGE_UINT
|
|
; EG-DAG: CNDE_INT
|
|
; EG-DAG: SUB_INT
|
|
; EG-DAG: SUB_INT
|
|
; EG-DAG: SUB_INT
|
|
define void @v_sub_i64(i64 addrspace(1)* noalias %out, i64 addrspace(1)* noalias %inA, i64 addrspace(1)* noalias %inB) nounwind {
|
|
%tid = call i32 @llvm.r600.read.tidig.x() readnone
|
|
%a_ptr = getelementptr i64 addrspace(1)* %inA, i32 %tid
|
|
%b_ptr = getelementptr i64 addrspace(1)* %inB, i32 %tid
|
|
%a = load i64 addrspace(1)* %a_ptr
|
|
%b = load i64 addrspace(1)* %b_ptr
|
|
%result = sub i64 %a, %b
|
|
store i64 %result, i64 addrspace(1)* %out, align 8
|
|
ret void
|
|
}
|
|
|
|
; FUNC-LABEL: {{^}}v_test_sub_v2i64:
|
|
; SI: v_sub_i32_e32
|
|
; SI: v_subb_u32_e32
|
|
; SI: v_sub_i32_e32
|
|
; SI: v_subb_u32_e32
|
|
define void @v_test_sub_v2i64(<2 x i64> addrspace(1)* %out, <2 x i64> addrspace(1)* noalias %inA, <2 x i64> addrspace(1)* noalias %inB) {
|
|
%tid = call i32 @llvm.r600.read.tidig.x() readnone
|
|
%a_ptr = getelementptr <2 x i64> addrspace(1)* %inA, i32 %tid
|
|
%b_ptr = getelementptr <2 x i64> addrspace(1)* %inB, i32 %tid
|
|
%a = load <2 x i64> addrspace(1)* %a_ptr
|
|
%b = load <2 x i64> addrspace(1)* %b_ptr
|
|
%result = sub <2 x i64> %a, %b
|
|
store <2 x i64> %result, <2 x i64> addrspace(1)* %out
|
|
ret void
|
|
}
|
|
|
|
; FUNC-LABEL: {{^}}v_test_sub_v4i64:
|
|
; SI: v_sub_i32_e32
|
|
; SI: v_subb_u32_e32
|
|
; SI: v_sub_i32_e32
|
|
; SI: v_subb_u32_e32
|
|
; SI: v_sub_i32_e32
|
|
; SI: v_subb_u32_e32
|
|
; SI: v_sub_i32_e32
|
|
; SI: v_subb_u32_e32
|
|
define void @v_test_sub_v4i64(<4 x i64> addrspace(1)* %out, <4 x i64> addrspace(1)* noalias %inA, <4 x i64> addrspace(1)* noalias %inB) {
|
|
%tid = call i32 @llvm.r600.read.tidig.x() readnone
|
|
%a_ptr = getelementptr <4 x i64> addrspace(1)* %inA, i32 %tid
|
|
%b_ptr = getelementptr <4 x i64> addrspace(1)* %inB, i32 %tid
|
|
%a = load <4 x i64> addrspace(1)* %a_ptr
|
|
%b = load <4 x i64> addrspace(1)* %b_ptr
|
|
%result = sub <4 x i64> %a, %b
|
|
store <4 x i64> %result, <4 x i64> addrspace(1)* %out
|
|
ret void
|
|
}
|