Jack Carter 571dd98ea4 Mips ELF: Mark object file as ABI compliant ... When producing objects that are abi compliant we are marking neither the object file nor the assembly file correctly and thus generate warnings. We need to set the EF_CPIC flag in the ELF header when generating direct object. Note that the warning is only generated when compiling without PIC. When compiling with clang the warning will be suppressed by supplying: -Wa,-mno-shared -Wa,-call_nonpic Also the following directive should also be added: .option pic0 when compiling without PIC, This eliminates the need for supplying: -mno-shared -call_nonpic on the assembler command line. Patch by Douglas Gilmore git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184220 91177308-0d34-0410-b5e6-96231b3b80d8		2013-06-18 19:47:15 +00:00
..
AsmParser	Use pointers to the MCAsmInfo and MCRegInfo.	2013-06-18 07:20:20 +00:00
Disassembler	Remove the Copied parameter from MemoryObject::readBytes.	2013-05-24 10:54:58 +00:00
InstPrinter
MCTargetDesc	Mips ELF: Mark object file as ABI compliant	2013-06-18 19:47:15 +00:00
TargetInfo
CMakeLists.txt	Fix CMakeLists.	2013-06-11 22:36:30 +00:00
LLVMBuild.txt
Makefile
MicroMipsInstrFormats.td
MicroMipsInstrInfo.td
Mips16FrameLowering.cpp	Use pointers to the MCAsmInfo and MCRegInfo.	2013-06-18 07:20:20 +00:00
Mips16FrameLowering.h
Mips16HardFloat.cpp
Mips16HardFloat.h
Mips16InstrFormats.td
Mips16InstrInfo.cpp	Don't cache the instruction and register info from the TargetMachine, because	2013-06-07 07:04:14 +00:00
Mips16InstrInfo.h
Mips16InstrInfo.td
Mips16ISelDAGToDAG.cpp	Cache the TargetLowering info object as a pointer.	2013-06-06 00:43:09 +00:00
Mips16ISelDAGToDAG.h	Track IR ordering of SelectionDAG nodes 2/4.	2013-05-25 02:42:55 +00:00
Mips16ISelLowering.cpp	Mips: Remove global set.	2013-06-13 19:06:52 +00:00
Mips16ISelLowering.h	Mips: Remove global set.	2013-06-13 19:06:52 +00:00
Mips16RegisterInfo.cpp	Don't cache the instruction and register info from the TargetMachine, because	2013-06-07 07:04:14 +00:00
Mips16RegisterInfo.h	Don't cache the instruction and register info from the TargetMachine, because	2013-06-07 07:04:14 +00:00
Mips64InstrInfo.td	[mips] Add instruction selection patterns for blez and bgez.	2013-05-21 17:13:47 +00:00
Mips.h	[mips] Add an IR transformation pass that optimizes calls to sqrt.	2013-06-11 22:21:44 +00:00
Mips.td
MipsAnalyzeImmediate.cpp	Replace Count{Leading,Trailing}Zeros_{32,64} with count{Leading,Trailing}Zeros.	2013-05-24 22:23:49 +00:00
MipsAnalyzeImmediate.h
MipsAsmPrinter.cpp	Mips ELF: Mark object file as ABI compliant	2013-06-18 19:47:15 +00:00
MipsAsmPrinter.h	DebugInfo: remove target-specific Frame Index handling for DBG_VALUE MachineInstrs	2013-06-16 20:34:27 +00:00
MipsCallingConv.td
MipsCodeEmitter.cpp	Don't cache the instruction and register info from the TargetMachine, because	2013-06-07 07:04:14 +00:00
MipsCondMov.td
MipsConstantIslandPass.cpp	Don't cache the instruction and register info from the TargetMachine, because	2013-06-07 07:04:14 +00:00
MipsDelaySlotFiller.cpp	Don't cache the instruction and register info from the TargetMachine, because	2013-06-07 07:04:14 +00:00
MipsDSPInstrFormats.td
MipsDSPInstrInfo.td
MipsFrameLowering.cpp
MipsFrameLowering.h
MipsInstrFormats.td	[mips] Trap on integer division by zero.	2013-05-20 18:07:43 +00:00
MipsInstrFPU.td	[mips] Improve instruction selection for pattern (store (fp_to_sint $src), $ptr).	2013-05-16 21:17:15 +00:00
MipsInstrInfo.cpp	DebugInfo: remove target-specific Frame Index handling for DBG_VALUE MachineInstrs	2013-06-16 20:34:27 +00:00
MipsInstrInfo.h	DebugInfo: remove target-specific Frame Index handling for DBG_VALUE MachineInstrs	2013-06-16 20:34:27 +00:00
MipsInstrInfo.td	[mips] brcond + setgt/setugt instruction selection patterns.	2013-06-05 19:49:55 +00:00
MipsISelDAGToDAG.cpp	Cache the TargetLowering info object as a pointer.	2013-06-06 00:43:09 +00:00
MipsISelDAGToDAG.h
MipsISelLowering.cpp	[mips] Big-endian code generation for atomic instructions.	2013-05-31 03:25:44 +00:00
MipsISelLowering.h	Track IR ordering of SelectionDAG nodes 2/4.	2013-05-25 02:42:55 +00:00
MipsJITInfo.cpp
MipsJITInfo.h
MipsLongBranch.cpp	Don't cache the instruction and register info from the TargetMachine, because	2013-06-07 07:04:14 +00:00
MipsMachineFunction.cpp
MipsMachineFunction.h
MipsMCInstLower.cpp
MipsMCInstLower.h
MipsModuleISelDAGToDAG.cpp
MipsModuleISelDAGToDAG.h
MipsOptimizeMathLibCalls.cpp	[mips] Add an IR transformation pass that optimizes calls to sqrt.	2013-06-11 22:21:44 +00:00
MipsOs16.cpp
MipsOs16.h
MipsRegisterInfo.cpp
MipsRegisterInfo.h
MipsRegisterInfo.td	Make SubRegIndex size mandatory, following r183020.	2013-05-31 23:45:26 +00:00
MipsRelocations.h
MipsSchedule.td
MipsSEFrameLowering.cpp	Use pointers to the MCAsmInfo and MCRegInfo.	2013-06-18 07:20:20 +00:00
MipsSEFrameLowering.h
MipsSEInstrInfo.cpp	[mips] Use function TargetInstrInfo::getRegClass.	2013-06-11 18:48:16 +00:00
MipsSEInstrInfo.h	[mips] Use function TargetInstrInfo::getRegClass.	2013-06-11 18:48:16 +00:00
MipsSEISelDAGToDAG.cpp	Cache the TargetLowering info object as a pointer.	2013-06-06 00:43:09 +00:00
MipsSEISelDAGToDAG.h	Track IR ordering of SelectionDAG nodes 2/4.	2013-05-25 02:42:55 +00:00
MipsSEISelLowering.cpp	Track IR ordering of SelectionDAG nodes 2/4.	2013-05-25 02:42:55 +00:00
MipsSEISelLowering.h
MipsSelectionDAGInfo.cpp
MipsSelectionDAGInfo.h
MipsSERegisterInfo.cpp	Don't cache the instruction and register info from the TargetMachine, because	2013-06-07 07:04:14 +00:00
MipsSERegisterInfo.h	Don't cache the instruction and register info from the TargetMachine, because	2013-06-07 07:04:14 +00:00
MipsSubtarget.cpp
MipsSubtarget.h
MipsTargetMachine.cpp	[mips] Add an IR transformation pass that optimizes calls to sqrt.	2013-06-11 22:21:44 +00:00
MipsTargetMachine.h
MipsTargetObjectFile.cpp
MipsTargetObjectFile.h