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https://github.com/c64scene-ar/llvm-6502.git
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516ab96de3
the -pre-regalloc-taildup command-line option, and add a new -disable-early-taildup option. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93597 91177308-0d34-0410-b5e6-96231b3b80d8
65 lines
2.5 KiB
LLVM
65 lines
2.5 KiB
LLVM
; RUN: llc < %s -relocation-model=pic -mtriple=arm-apple-darwin | FileCheck %s -check-prefix=ARM
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; RUN: llc < %s -relocation-model=pic -mtriple=thumb-apple-darwin | FileCheck %s -check-prefix=THUMB
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; RUN: llc < %s -relocation-model=static -mtriple=thumbv7-apple-darwin | FileCheck %s -check-prefix=THUMB2
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@nextaddr = global i8* null ; <i8**> [#uses=2]
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@C.0.2070 = private constant [5 x i8*] [i8* blockaddress(@foo, %L1), i8* blockaddress(@foo, %L2), i8* blockaddress(@foo, %L3), i8* blockaddress(@foo, %L4), i8* blockaddress(@foo, %L5)] ; <[5 x i8*]*> [#uses=1]
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define internal arm_apcscc i32 @foo(i32 %i) nounwind {
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; ARM: foo:
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; THUMB: foo:
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; THUMB2: foo:
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entry:
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%0 = load i8** @nextaddr, align 4 ; <i8*> [#uses=2]
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%1 = icmp eq i8* %0, null ; <i1> [#uses=1]
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; indirect branch gets duplicated here
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; ARM: bx
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; THUMB: mov pc, r1
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; THUMB2: mov pc, r1
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br i1 %1, label %bb3, label %bb2
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bb2: ; preds = %entry, %bb3
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%gotovar.4.0 = phi i8* [ %gotovar.4.0.pre, %bb3 ], [ %0, %entry ] ; <i8*> [#uses=1]
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; ARM: bx
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; THUMB: mov pc, r1
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; THUMB2: mov pc, r1
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indirectbr i8* %gotovar.4.0, [label %L5, label %L4, label %L3, label %L2, label %L1]
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bb3: ; preds = %entry
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%2 = getelementptr inbounds [5 x i8*]* @C.0.2070, i32 0, i32 %i ; <i8**> [#uses=1]
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%gotovar.4.0.pre = load i8** %2, align 4 ; <i8*> [#uses=1]
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br label %bb2
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L5: ; preds = %bb2
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br label %L4
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L4: ; preds = %L5, %bb2
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%res.0 = phi i32 [ 385, %L5 ], [ 35, %bb2 ] ; <i32> [#uses=1]
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br label %L3
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L3: ; preds = %L4, %bb2
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%res.1 = phi i32 [ %res.0, %L4 ], [ 5, %bb2 ] ; <i32> [#uses=1]
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br label %L2
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L2: ; preds = %L3, %bb2
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%res.2 = phi i32 [ %res.1, %L3 ], [ 1, %bb2 ] ; <i32> [#uses=1]
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%phitmp = mul i32 %res.2, 6 ; <i32> [#uses=1]
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br label %L1
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L1: ; preds = %L2, %bb2
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%res.3 = phi i32 [ %phitmp, %L2 ], [ 2, %bb2 ] ; <i32> [#uses=1]
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; ARM: ldr r1, LCPI
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; ARM: add r1, pc, r1
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; ARM: str r1
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; THUMB: ldr.n r2, LCPI
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; THUMB: add r2, pc
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; THUMB: str r2
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; THUMB2: ldr.n r2, LCPI
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; THUMB2-NEXT: str r2
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store i8* blockaddress(@foo, %L5), i8** @nextaddr, align 4
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ret i32 %res.3
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}
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; ARM: .long L_BA4__foo_L5-(LPC{{.*}}+8)
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; THUMB: .long L_BA4__foo_L5-(LPC{{.*}}+4)
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; THUMB2: .long L_BA4__foo_L5
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