llvm-6502/test/MC
Colin LeMahieu b7927f100d [Hexagon] Converting from ADD_rr to A2_add which has encoding bits.
Adding test to show correct instruction selection and encoding.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222249 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-18 20:28:11 +00:00
..
AArch64
ARM
AsmParser
COFF
Disassembler
ELF
Hexagon [Hexagon] Converting from ADD_rr to A2_add which has encoding bits. 2014-11-18 20:28:11 +00:00
MachO
Markup
Mips [mips] Add hardware register name "hwr_ulr" ($29) 2014-11-11 11:22:39 +00:00
PowerPC
R600 R600/SI: Start implementing an assembler 2014-11-14 14:08:00 +00:00
Sparc
SystemZ
X86