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57ac1f458a
Given a thread-local symbol x with global-dynamic access, the generated
code to obtain x's address is:
Instruction Relocation Symbol
addis ra,r2,x@got@tlsgd@ha R_PPC64_GOT_TLSGD16_HA x
addi r3,ra,x@got@tlsgd@l R_PPC64_GOT_TLSGD16_L x
bl __tls_get_addr(x@tlsgd) R_PPC64_TLSGD x
R_PPC64_REL24 __tls_get_addr
nop
<use address in r3>
The implementation borrows from the medium code model work for introducing
special forms of ADDIS and ADDI into the DAG representation. This is made
slightly more complicated by having to introduce a call to the external
function __tls_get_addr. Using the full call machinery is overkill and,
more importantly, makes it difficult to add a special relocation. So I've
introduced another opcode GET_TLS_ADDR to represent the function call, and
surrounded it with register copies to set up the parameter and return value.
Most of the code is pretty straightforward. I ran into one peculiarity
when I introduced a new PPC opcode BL8_NOP_ELF_TLSGD, which is just like
BL8_NOP_ELF except that it takes another parameter to represent the symbol
("x" above) that requires a relocation on the call. Something in the
TblGen machinery causes BL8_NOP_ELF and BL8_NOP_ELF_TLSGD to be treated
identically during the emit phase, so this second operand was never
visited to generate relocations. This is the reason for the slightly
messy workaround in PPCMCCodeEmitter.cpp:getDirectBrEncoding().
Two new tests are included to demonstrate correct external assembly and
correct generation of relocations using the integrated assembler.
Comments welcome!
Thanks,
Bill
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169910 91177308-0d34-0410-b5e6-96231b3b80d8
63 lines
1.7 KiB
C++
63 lines
1.7 KiB
C++
//===-- PPCFixupKinds.h - PPC Specific Fixup Entries ------------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_PPC_PPCFIXUPKINDS_H
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#define LLVM_PPC_PPCFIXUPKINDS_H
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#include "llvm/MC/MCFixup.h"
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namespace llvm {
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namespace PPC {
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enum Fixups {
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// fixup_ppc_br24 - 24-bit PC relative relocation for direct branches like 'b'
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// and 'bl'.
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fixup_ppc_br24 = FirstTargetFixupKind,
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/// fixup_ppc_brcond14 - 14-bit PC relative relocation for conditional
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/// branches.
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fixup_ppc_brcond14,
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/// fixup_ppc_lo16 - A 16-bit fixup corresponding to lo16(_foo) for instrs
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/// like 'li'.
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fixup_ppc_lo16,
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/// fixup_ppc_ha16 - A 16-bit fixup corresponding to ha16(_foo) for instrs
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/// like 'lis'.
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fixup_ppc_ha16,
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/// fixup_ppc_lo14 - A 14-bit fixup corresponding to lo16(_foo) for instrs
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/// like 'std'.
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fixup_ppc_lo14,
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/// fixup_ppc_toc - Insert value of TOC base (.TOC.).
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fixup_ppc_toc,
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/// fixup_ppc_toc16 - A 16-bit signed fixup relative to the TOC base.
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fixup_ppc_toc16,
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/// fixup_ppc_toc16_ds - A 14-bit signed fixup relative to the TOC base with
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/// implied 2 zero bits
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fixup_ppc_toc16_ds,
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/// fixup_ppc_tlsreg - Insert thread-pointer register number.
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fixup_ppc_tlsreg,
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/// fixup_ppc_tlsgd - Not a true fixup, but ties a symbol to a call
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/// to __tls_get_addr for the TLS global dynamic model.
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fixup_ppc_tlsgd,
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// Marker
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LastTargetFixupKind,
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NumTargetFixupKinds = LastTargetFixupKind - FirstTargetFixupKind
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};
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}
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}
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#endif
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