mirror of
https://github.com/c64scene-ar/llvm-6502.git
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58f58c97f0
system headers above the includes of generated '.inc' files that actually contain code. In a few targets this was already done pretty consistently, but it wasn't done *really* consistently anywhere. It is strictly cleaner IMO and necessary in a bunch of places where the DEBUG_TYPE is referenced from the generated code. Consistency with the necessary places trumps. Hopefully the build bots are OK with the movement of intrin.h... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206838 91177308-0d34-0410-b5e6-96231b3b80d8
100 lines
3.0 KiB
C++
100 lines
3.0 KiB
C++
//===-- AArch64Subtarget.cpp - AArch64 Subtarget Information --------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements the AArch64 specific subclass of TargetSubtargetInfo.
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//
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//===----------------------------------------------------------------------===//
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#include "AArch64Subtarget.h"
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#include "AArch64RegisterInfo.h"
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#include "MCTargetDesc/AArch64MCTargetDesc.h"
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#include "llvm/ADT/SmallVector.h"
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#include "llvm/IR/GlobalValue.h"
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#include "llvm/Support/CommandLine.h"
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#include "llvm/Target/TargetSubtargetInfo.h"
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using namespace llvm;
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#define DEBUG_TYPE "aarch64-subtarget"
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#define GET_SUBTARGETINFO_TARGET_DESC
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#define GET_SUBTARGETINFO_CTOR
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#include "AArch64GenSubtargetInfo.inc"
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enum AlignMode {
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DefaultAlign,
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StrictAlign,
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NoStrictAlign
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};
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static cl::opt<AlignMode>
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Align(cl::desc("Load/store alignment support"),
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cl::Hidden, cl::init(DefaultAlign),
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cl::values(
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clEnumValN(DefaultAlign, "aarch64-default-align",
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"Generate unaligned accesses only on hardware/OS "
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"combinations that are known to support them"),
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clEnumValN(StrictAlign, "aarch64-strict-align",
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"Disallow all unaligned memory accesses"),
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clEnumValN(NoStrictAlign, "aarch64-no-strict-align",
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"Allow unaligned memory accesses"),
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clEnumValEnd));
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// Pin the vtable to this file.
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void AArch64Subtarget::anchor() {}
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AArch64Subtarget::AArch64Subtarget(StringRef TT, StringRef CPU, StringRef FS,
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bool LittleEndian)
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: AArch64GenSubtargetInfo(TT, CPU, FS), ARMProcFamily(Others),
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HasFPARMv8(false), HasNEON(false), HasCrypto(false), TargetTriple(TT),
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CPUString(CPU), IsLittleEndian(LittleEndian) {
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initializeSubtargetFeatures(CPU, FS);
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}
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void AArch64Subtarget::initializeSubtargetFeatures(StringRef CPU,
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StringRef FS) {
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AllowsUnalignedMem = false;
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if (CPU.empty())
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CPUString = "generic";
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std::string FullFS = FS;
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if (CPUString == "generic") {
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// Enable FP by default.
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if (FullFS.empty())
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FullFS = "+fp-armv8";
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else
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FullFS = "+fp-armv8," + FullFS;
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}
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ParseSubtargetFeatures(CPU, FullFS);
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switch (Align) {
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case DefaultAlign:
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// Linux targets support unaligned accesses on AARCH64
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AllowsUnalignedMem = isTargetLinux();
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break;
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case StrictAlign:
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AllowsUnalignedMem = false;
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break;
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case NoStrictAlign:
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AllowsUnalignedMem = true;
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break;
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}
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}
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bool AArch64Subtarget::GVIsIndirectSymbol(const GlobalValue *GV,
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Reloc::Model RelocM) const {
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if (RelocM == Reloc::Static)
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return false;
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return !GV->hasLocalLinkage() && !GV->hasHiddenVisibility();
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}
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