llvm-6502/include/llvm/CodeGen
Andrew Trick 13372886a6 MI Sched: Register pressure heuristics.
Consider which set is being increased or decreased before comparing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187110 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-25 07:26:35 +00:00
..
PBQP
Analysis.h
AsmPrinter.h
CalcSpillWeights.h
CallingConvLower.h
CommandFlags.h
DAGCombine.h
DFAPacketizer.h
EdgeBundles.h
FastISel.h
FunctionLoweringInfo.h
GCMetadata.h
GCMetadataPrinter.h
GCs.h
GCStrategy.h
IntrinsicLowering.h
ISDOpcodes.h
JITCodeEmitter.h
LatencyPriorityQueue.h
LexicalScopes.h
LinkAllAsmWriterComponents.h
LinkAllCodegenComponents.h
LiveInterval.h
LiveIntervalAnalysis.h
LiveIntervalUnion.h
LiveRangeEdit.h
LiveRegMatrix.h
LiveStackAnalysis.h
LiveVariables.h
MachineBasicBlock.h
MachineBlockFrequencyInfo.h
MachineBranchProbabilityInfo.h
MachineCodeEmitter.h
MachineCodeInfo.h
MachineConstantPool.h
MachineDominators.h
MachineFrameInfo.h
MachineFunction.h
MachineFunctionAnalysis.h
MachineFunctionPass.h
MachineInstr.h
MachineInstrBuilder.h
MachineInstrBundle.h
MachineJumpTableInfo.h
MachineLoopInfo.h
MachineMemOperand.h
MachineModuleInfo.h
MachineModuleInfoImpls.h
MachineOperand.h
MachinePassRegistry.h
MachinePostDominators.h
MachineRegisterInfo.h
MachineRelocation.h
MachineScheduler.h
MachineSSAUpdater.h
MachineTraceMetrics.h
MachORelocation.h
Passes.h
PseudoSourceValue.h
RegAllocPBQP.h
RegAllocRegistry.h
RegisterClassInfo.h
RegisterPressure.h MI Sched: Register pressure heuristics. 2013-07-25 07:26:35 +00:00
RegisterScavenging.h
ResourcePriorityQueue.h
RuntimeLibcalls.h
ScheduleDAG.h
ScheduleDAGInstrs.h Machine Model: Add MicroOpBufferSize and resource BufferSize. 2013-06-15 04:49:57 +00:00
ScheduleDFS.h
ScheduleHazardRecognizer.h
SchedulerRegistry.h
ScoreboardHazardRecognizer.h
SelectionDAG.h
SelectionDAGISel.h
SelectionDAGNodes.h
SlotIndexes.h
TargetLoweringObjectFileImpl.h
TargetSchedule.h
ValueTypes.h
ValueTypes.td
VirtRegMap.h