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7c9c6ed761
Essentially the same as the GEP change in r230786.
A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)
import fileinput
import sys
import re
pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")
for line in sys.stdin:
sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7649
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
29 lines
961 B
LLVM
29 lines
961 B
LLVM
; RUN: llc < %s -mtriple=armv7-apple-darwin -mcpu=cortex-a8 | FileCheck %s
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; Check if the f32 load / store pair are optimized to i32 load / store.
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; rdar://8944252
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define void @t(i32 %width, float* nocapture %src, float* nocapture %dst, i32 %index) nounwind {
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; CHECK-LABEL: t:
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entry:
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%src6 = bitcast float* %src to i8*
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%0 = icmp eq i32 %width, 0
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br i1 %0, label %return, label %bb
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bb:
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; CHECK: ldr [[REGISTER:(r[0-9]+)]], [{{r[0-9]+}}], {{r[0-9]+}}
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; CHECK: str [[REGISTER]], [{{r[0-9]+}}], #4
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%j.05 = phi i32 [ %2, %bb ], [ 0, %entry ]
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%tmp = mul i32 %j.05, %index
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%uglygep = getelementptr i8, i8* %src6, i32 %tmp
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%src_addr.04 = bitcast i8* %uglygep to float*
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%dst_addr.03 = getelementptr float, float* %dst, i32 %j.05
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%1 = load float, float* %src_addr.04, align 4
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store float %1, float* %dst_addr.03, align 4
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%2 = add i32 %j.05, 1
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%exitcond = icmp eq i32 %2, %width
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br i1 %exitcond, label %return, label %bb
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return:
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ret void
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}
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