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https://github.com/c64scene-ar/llvm-6502.git
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4907d22a90
still lots of uglyness. Maybe calls will come soon. Fixing the return value of things will be necessary to make alpha work. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23832 91177308-0d34-0410-b5e6-96231b3b80d8
362 lines
12 KiB
C++
362 lines
12 KiB
C++
//===- AlphaRegisterInfo.cpp - Alpha Register Information -------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file was developed by the LLVM research group and is distributed under
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// the University of Illinois Open Source License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the Alpha implementation of the MRegisterInfo class.
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//
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//===----------------------------------------------------------------------===//
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#define DEBUG_TYPE "reginfo"
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#include "Alpha.h"
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#include "AlphaRegisterInfo.h"
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#include "llvm/Constants.h"
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#include "llvm/Type.h"
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#include "llvm/Function.h"
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#include "llvm/CodeGen/ValueTypes.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/MachineFrameInfo.h"
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#include "llvm/Target/TargetFrameInfo.h"
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Target/TargetOptions.h"
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#include "llvm/Support/CommandLine.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/ADT/STLExtras.h"
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#include <cstdlib>
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#include <iostream>
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using namespace llvm;
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namespace llvm {
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extern cl::opt<bool> EnableAlphaLSMark;
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}
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//These describe LDAx
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static const int IMM_LOW = -32768;
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static const int IMM_HIGH = 32767;
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static const int IMM_MULT = 65536;
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static long getUpper16(long l)
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{
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long y = l / IMM_MULT;
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if (l % IMM_MULT > IMM_HIGH)
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++y;
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return y;
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}
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static long getLower16(long l)
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{
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long h = getUpper16(l);
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return l - h * IMM_MULT;
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}
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static int getUID()
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{
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static int id = 0;
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return ++id;
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}
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AlphaRegisterInfo::AlphaRegisterInfo()
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: AlphaGenRegisterInfo(Alpha::ADJUSTSTACKDOWN, Alpha::ADJUSTSTACKUP)
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{
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}
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static const TargetRegisterClass *getClass(unsigned SrcReg) {
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if (Alpha::FPRCRegisterClass->contains(SrcReg))
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return Alpha::FPRCRegisterClass;
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assert(Alpha::GPRCRegisterClass->contains(SrcReg) && "Reg not FPR or GPR");
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return Alpha::GPRCRegisterClass;
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}
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void
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AlphaRegisterInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MI,
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unsigned SrcReg, int FrameIdx,
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const TargetRegisterClass *RC) const {
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//std::cerr << "Trying to store " << getPrettyName(SrcReg) << " to " << FrameIdx << "\n";
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//BuildMI(MBB, MI, Alpha::WTF, 0).addReg(SrcReg);
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if (EnableAlphaLSMark)
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BuildMI(MBB, MI, Alpha::MEMLABEL, 4).addImm(4).addImm(0).addImm(1)
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.addImm(getUID());
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if (getClass(SrcReg) == Alpha::FPRCRegisterClass)
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BuildMI(MBB, MI, Alpha::STT, 3).addReg(SrcReg).addFrameIndex(FrameIdx).addReg(Alpha::F31);
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else if (getClass(SrcReg) == Alpha::GPRCRegisterClass)
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BuildMI(MBB, MI, Alpha::STQ, 3).addReg(SrcReg).addFrameIndex(FrameIdx).addReg(Alpha::F31);
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else
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abort();
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}
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void
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AlphaRegisterInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MI,
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unsigned DestReg, int FrameIdx,
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const TargetRegisterClass *RC) const {
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//std::cerr << "Trying to load " << getPrettyName(DestReg) << " to " << FrameIdx << "\n";
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if (EnableAlphaLSMark)
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BuildMI(MBB, MI, Alpha::MEMLABEL, 4).addImm(4).addImm(0).addImm(2)
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.addImm(getUID());
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if (getClass(DestReg) == Alpha::FPRCRegisterClass)
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BuildMI(MBB, MI, Alpha::LDT, 2, DestReg).addFrameIndex(FrameIdx).addReg(Alpha::F31);
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else if (getClass(DestReg) == Alpha::GPRCRegisterClass)
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BuildMI(MBB, MI, Alpha::LDQ, 2, DestReg).addFrameIndex(FrameIdx).addReg(Alpha::F31);
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else
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abort();
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}
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unsigned
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AlphaRegisterInfo::isLoadFromStackSlot(MachineInstr *MI, int &FrameIndex) const
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{
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switch (MI->getOpcode()) {
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case Alpha::LDL:
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case Alpha::LDQ:
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case Alpha::LDBU:
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case Alpha::LDWU:
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case Alpha::LDS:
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case Alpha::LDT:
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if (MI->getOperand(1).isFrameIndex()) {
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FrameIndex = MI->getOperand(1).getFrameIndex();
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return MI->getOperand(0).getReg();
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}
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break;
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}
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return 0;
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}
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void AlphaRegisterInfo::copyRegToReg(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MI,
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unsigned DestReg, unsigned SrcReg,
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const TargetRegisterClass *RC) const {
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// std::cerr << "copyRegToReg " << DestReg << " <- " << SrcReg << "\n";
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if (RC == Alpha::GPRCRegisterClass) {
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BuildMI(MBB, MI, Alpha::BIS, 2, DestReg).addReg(SrcReg).addReg(SrcReg);
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} else if (RC == Alpha::FPRCRegisterClass) {
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BuildMI(MBB, MI, Alpha::CPYS, 2, DestReg).addReg(SrcReg).addReg(SrcReg);
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} else {
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std::cerr << "Attempt to copy register that is not GPR or FPR";
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abort();
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}
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}
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//===----------------------------------------------------------------------===//
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// Stack Frame Processing methods
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//===----------------------------------------------------------------------===//
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// hasFP - Return true if the specified function should have a dedicated frame
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// pointer register. This is true if the function has variable sized allocas or
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// if frame pointer elimination is disabled.
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//
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static bool hasFP(MachineFunction &MF) {
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MachineFrameInfo *MFI = MF.getFrameInfo();
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return MFI->hasVarSizedObjects();
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}
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void AlphaRegisterInfo::
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eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
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MachineBasicBlock::iterator I) const {
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if (hasFP(MF)) {
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// If we have a frame pointer, turn the adjcallstackup instruction into a
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// 'sub ESP, <amt>' and the adjcallstackdown instruction into 'add ESP,
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// <amt>'
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MachineInstr *Old = I;
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unsigned Amount = Old->getOperand(0).getImmedValue();
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if (Amount != 0) {
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// We need to keep the stack aligned properly. To do this, we round the
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// amount of space needed for the outgoing arguments up to the next
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// alignment boundary.
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unsigned Align = MF.getTarget().getFrameInfo()->getStackAlignment();
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Amount = (Amount+Align-1)/Align*Align;
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MachineInstr *New;
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if (Old->getOpcode() == Alpha::ADJUSTSTACKDOWN) {
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New=BuildMI(Alpha::LDA, 2, Alpha::R30)
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.addImm(-Amount).addReg(Alpha::R30);
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} else {
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assert(Old->getOpcode() == Alpha::ADJUSTSTACKUP);
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New=BuildMI(Alpha::LDA, 2, Alpha::R30)
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.addImm(Amount).addReg(Alpha::R30);
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}
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// Replace the pseudo instruction with a new instruction...
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MBB.insert(I, New);
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}
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}
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MBB.erase(I);
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}
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//Alpha has a slightly funny stack:
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//Args
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//<- incoming SP
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//fixed locals (and spills, callee saved, etc)
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//<- FP
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//variable locals
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//<- SP
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void
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AlphaRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II) const {
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unsigned i = 0;
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MachineInstr &MI = *II;
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MachineBasicBlock &MBB = *MI.getParent();
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MachineFunction &MF = *MBB.getParent();
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bool FP = hasFP(MF);
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while (!MI.getOperand(i).isFrameIndex()) {
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++i;
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assert(i < MI.getNumOperands() && "Instr doesn't have FrameIndex operand!");
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}
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int FrameIndex = MI.getOperand(i).getFrameIndex();
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// Add the base register of R30 (SP) or R15 (FP).
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MI.SetMachineOperandReg(i + 1, FP ? Alpha::R15 : Alpha::R30);
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// Now add the frame object offset to the offset from the virtual frame index.
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int Offset = MF.getFrameInfo()->getObjectOffset(FrameIndex);
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DEBUG(std::cerr << "FI: " << FrameIndex << " Offset: " << Offset << "\n");
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Offset += MF.getFrameInfo()->getStackSize();
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DEBUG(std::cerr << "Corrected Offset " << Offset <<
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" for stack size: " << MF.getFrameInfo()->getStackSize() << "\n");
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if (Offset > IMM_HIGH || Offset < IMM_LOW) {
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//so in this case, we need to use a temporary register, and move the original
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//inst off the SP/FP
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//fix up the old:
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MI.SetMachineOperandReg(i + 1, Alpha::R28);
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MI.SetMachineOperandConst(i, MachineOperand::MO_SignExtendedImmed,
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getLower16(Offset));
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//insert the new
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MachineInstr* nMI=BuildMI(Alpha::LDAH, 2, Alpha::R28)
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.addImm(getUpper16(Offset)).addReg(FP ? Alpha::R15 : Alpha::R30);
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MBB.insert(II, nMI);
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} else {
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MI.SetMachineOperandConst(i, MachineOperand::MO_SignExtendedImmed, Offset);
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}
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}
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void AlphaRegisterInfo::emitPrologue(MachineFunction &MF) const {
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MachineBasicBlock &MBB = MF.front(); // Prolog goes in entry BB
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MachineBasicBlock::iterator MBBI = MBB.begin();
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MachineFrameInfo *MFI = MF.getFrameInfo();
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bool FP = hasFP(MF);
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static int curgpdist = 0;
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//handle GOP offset
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BuildMI(MBB, MBBI, Alpha::LDAHg, 3, Alpha::R29)
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.addGlobalAddress(const_cast<Function*>(MF.getFunction()))
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.addReg(Alpha::R27).addImm(++curgpdist);
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BuildMI(MBB, MBBI, Alpha::LDAg, 3, Alpha::R29)
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.addGlobalAddress(const_cast<Function*>(MF.getFunction()))
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.addReg(Alpha::R29).addImm(curgpdist);
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//evil const_cast until MO stuff setup to handle const
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BuildMI(MBB, MBBI, Alpha::ALTENT, 1).addGlobalAddress(const_cast<Function*>(MF.getFunction()), true);
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// Get the number of bytes to allocate from the FrameInfo
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long NumBytes = MFI->getStackSize();
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if (MFI->hasCalls() && !FP) {
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// We reserve argument space for call sites in the function immediately on
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// entry to the current function. This eliminates the need for add/sub
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// brackets around call sites.
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//If there is a frame pointer, then we don't do this
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NumBytes += MFI->getMaxCallFrameSize();
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DEBUG(std::cerr << "Added " << MFI->getMaxCallFrameSize()
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<< " to the stack due to calls\n");
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}
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if (FP)
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NumBytes += 8; //reserve space for the old FP
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// Do we need to allocate space on the stack?
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if (NumBytes == 0) return;
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// Update frame info to pretend that this is part of the stack...
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MFI->setStackSize(NumBytes);
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// adjust stack pointer: r30 -= numbytes
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NumBytes = -NumBytes;
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if (NumBytes >= IMM_LOW) {
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BuildMI(MBB, MBBI, Alpha::LDA, 2, Alpha::R30).addImm(NumBytes)
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.addReg(Alpha::R30);
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} else if (getUpper16(NumBytes) >= IMM_LOW) {
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BuildMI(MBB, MBBI, Alpha::LDAH, 2, Alpha::R30).addImm(getUpper16(NumBytes))
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.addReg(Alpha::R30);
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BuildMI(MBB, MBBI, Alpha::LDA, 2, Alpha::R30).addImm(getLower16(NumBytes))
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.addReg(Alpha::R30);
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} else {
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std::cerr << "Too big a stack frame at " << NumBytes << "\n";
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abort();
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}
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//now if we need to, save the old FP and set the new
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if (FP)
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{
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if (EnableAlphaLSMark)
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BuildMI(MBB, MBBI, Alpha::MEMLABEL, 4).addImm(4).addImm(0).addImm(1)
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.addImm(getUID());
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BuildMI(MBB, MBBI, Alpha::STQ, 3).addReg(Alpha::R15).addImm(0).addReg(Alpha::R30);
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//this must be the last instr in the prolog
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BuildMI(MBB, MBBI, Alpha::BIS, 2, Alpha::R15).addReg(Alpha::R30).addReg(Alpha::R30);
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}
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}
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void AlphaRegisterInfo::emitEpilogue(MachineFunction &MF,
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MachineBasicBlock &MBB) const {
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const MachineFrameInfo *MFI = MF.getFrameInfo();
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MachineBasicBlock::iterator MBBI = prior(MBB.end());
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assert(((MBBI->getOpcode() == Alpha::RET) || (MBBI->getOpcode() == Alpha::RETDAG))
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&& "Can only insert epilog into returning blocks");
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bool FP = hasFP(MF);
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// Get the number of bytes allocated from the FrameInfo...
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long NumBytes = MFI->getStackSize();
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//now if we need to, restore the old FP
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if (FP)
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{
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//copy the FP into the SP (discards allocas)
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BuildMI(MBB, MBBI, Alpha::BIS, 2, Alpha::R30).addReg(Alpha::R15)
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.addReg(Alpha::R15);
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//restore the FP
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if (EnableAlphaLSMark)
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BuildMI(MBB, MBBI, Alpha::MEMLABEL, 4).addImm(4).addImm(0).addImm(2)
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.addImm(getUID());
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BuildMI(MBB, MBBI, Alpha::LDQ, 2, Alpha::R15).addImm(0).addReg(Alpha::R15);
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}
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if (NumBytes != 0)
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{
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if (NumBytes <= IMM_HIGH) {
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BuildMI(MBB, MBBI, Alpha::LDA, 2, Alpha::R30).addImm(NumBytes)
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.addReg(Alpha::R30);
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} else if (getUpper16(NumBytes) <= IMM_HIGH) {
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BuildMI(MBB, MBBI, Alpha::LDAH, 2, Alpha::R30)
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.addImm(getUpper16(NumBytes)).addReg(Alpha::R30);
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BuildMI(MBB, MBBI, Alpha::LDA, 2, Alpha::R30)
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.addImm(getLower16(NumBytes)).addReg(Alpha::R30);
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} else {
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std::cerr << "Too big a stack frame at " << NumBytes << "\n";
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abort();
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}
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}
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}
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#include "AlphaGenRegisterInfo.inc"
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std::string AlphaRegisterInfo::getPrettyName(unsigned reg)
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{
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std::string s(RegisterDescriptors[reg].Name);
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return s;
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}
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