mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-11-15 20:06:46 +00:00
584fb0e663
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138077 91177308-0d34-0410-b5e6-96231b3b80d8
324 lines
11 KiB
ArmAsm
324 lines
11 KiB
ArmAsm
@ RUN: llvm-mc -triple=thumbv6-apple-darwin -show-encoding < %s | FileCheck %s
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.syntax unified
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.globl _func
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@ Check that the assembler can handle the documented syntax from the ARM ARM.
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@ For complex constructs like shifter operands, check more thoroughly for them
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@ once then spot check that following instructions accept the form generally.
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@ This gives us good coverage while keeping the overall size of the test
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@ more reasonable.
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@ FIXME: Some 3-operand instructions have a 2-operand assembly syntax.
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_func:
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@ CHECK: _func
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@------------------------------------------------------------------------------
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@ ADC (register)
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@------------------------------------------------------------------------------
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adcs r4, r6
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@ CHECK: adcs r4, r6 @ encoding: [0x74,0x41]
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@------------------------------------------------------------------------------
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@ ADD (immediate)
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@------------------------------------------------------------------------------
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adds r1, r2, #3
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adds r2, #3
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adds r2, #8
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@ CHECK: adds r1, r2, #3 @ encoding: [0xd1,0x1c]
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@ CHECK: adds r2, r2, #3 @ encoding: [0xd2,0x1c]
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@ CHECK: adds r2, #8 @ encoding: [0x08,0x32]
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@------------------------------------------------------------------------------
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@ ADD (register)
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@------------------------------------------------------------------------------
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adds r1, r2, r3
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add r2, r8
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@ CHECK: adds r1, r2, r3 @ encoding: [0xd1,0x18]
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@ CHECK: add r2, r8 @ encoding: [0x42,0x44]
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@------------------------------------------------------------------------------
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@ FIXME: ADD (SP plus immediate)
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@------------------------------------------------------------------------------
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@------------------------------------------------------------------------------
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@ FIXME: ADD (SP plus register)
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@------------------------------------------------------------------------------
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@------------------------------------------------------------------------------
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@ ADR
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@------------------------------------------------------------------------------
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adr r2, _baz
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@ CHECK: adr r2, _baz @ encoding: [A,0xa2]
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@ fixup A - offset: 0, value: _baz, kind: fixup_thumb_adr_pcrel_10
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@------------------------------------------------------------------------------
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@ ASR (immediate)
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@------------------------------------------------------------------------------
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asrs r2, r3, #32
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asrs r2, r3, #5
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asrs r2, r3, #1
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@ CHECK: asrs r2, r3, #32 @ encoding: [0x1a,0x10]
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@ CHECK: asrs r2, r3, #5 @ encoding: [0x5a,0x11]
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@ CHECK: asrs r2, r3, #1 @ encoding: [0x5a,0x10]
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@------------------------------------------------------------------------------
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@ ASR (register)
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@------------------------------------------------------------------------------
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asrs r5, r2
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@ CHECK: asrs r5, r2 @ encoding: [0x15,0x41]
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@------------------------------------------------------------------------------
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@ B
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@------------------------------------------------------------------------------
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b _baz
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beq _bar
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@ CHECK: b _baz @ encoding: [A,0xe0'A']
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@ fixup A - offset: 0, value: _baz, kind: fixup_arm_thumb_br
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@ CHECK: beq _bar @ encoding: [A,0xd0]
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@ fixup A - offset: 0, value: _bar, kind: fixup_arm_thumb_bcc
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@------------------------------------------------------------------------------
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@ BICS
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@------------------------------------------------------------------------------
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bics r1, r6
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@ CHECK: bics r1, r6 @ encoding: [0xb1,0x43]
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@------------------------------------------------------------------------------
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@ BKPT
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@------------------------------------------------------------------------------
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bkpt #0
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bkpt #255
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@ CHECK: bkpt #0 @ encoding: [0x00,0xbe]
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@ CHECK: bkpt #255 @ encoding: [0xff,0xbe]
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@------------------------------------------------------------------------------
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@ BL/BLX (immediate)
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@------------------------------------------------------------------------------
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bl _bar
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blx _baz
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@ CHECK: bl _bar @ encoding: [A,0xf0'A',A,0xf8'A']
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@ fixup A - offset: 0, value: _bar, kind: fixup_arm_thumb_bl
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@ CHECK: blx _baz @ encoding: [A,0xf0'A',A,0xe8'A']
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@ fixup A - offset: 0, value: _baz, kind: fixup_arm_thumb_blx
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@------------------------------------------------------------------------------
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@ BLX (register)
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@------------------------------------------------------------------------------
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blx r4
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@ CHECK: blx r4 @ encoding: [0xa0,0x47]
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@------------------------------------------------------------------------------
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@ BX
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@------------------------------------------------------------------------------
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bx r2
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@ CHECK: bx r2 @ encoding: [0x10,0x47]
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@------------------------------------------------------------------------------
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@ CMN
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@------------------------------------------------------------------------------
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cmn r5, r1
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@ CHECK: cmn r5, r1 @ encoding: [0xcd,0x42]
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@------------------------------------------------------------------------------
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@ CMP
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@------------------------------------------------------------------------------
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cmp r6, #32
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cmp r3, r4
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cmp r8, r1
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@ CHECK: cmp r6, #32 @ encoding: [0x20,0x2e]
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@ CHECK: cmp r3, r4 @ encoding: [0xa3,0x42]
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@ CHECK: cmp r8, r1 @ encoding: [0x88,0x45]
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@------------------------------------------------------------------------------
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@ EOR
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@------------------------------------------------------------------------------
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eors r4, r5
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@ CHECK: eors r4, r5 @ encoding: [0x6c,0x40]
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@------------------------------------------------------------------------------
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@ LDM
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@------------------------------------------------------------------------------
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ldm r3, {r0, r1, r2, r3, r4, r5, r6, r7}
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ldm r2!, {r1, r3, r4, r5, r7}
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ldm r1, {r1}
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@ CHECK: ldm r3, {r0, r1, r2, r3, r4, r5, r6, r7} @ encoding: [0xff,0xcb]
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@ CHECK: ldm r2!, {r1, r3, r4, r5, r7} @ encoding: [0xba,0xca]
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@ CHECK: ldm r1, {r1} @ encoding: [0x02,0xc9]
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@------------------------------------------------------------------------------
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@ LDR (immediate)
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@------------------------------------------------------------------------------
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ldr r1, [r5]
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ldr r2, [r6, #32]
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ldr r3, [r7, #124]
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ldr r1, [sp]
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ldr r2, [sp, #24]
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ldr r3, [sp, #1020]
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@ CHECK: ldr r1, [r5] @ encoding: [0x29,0x68]
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@ CHECK: ldr r2, [r6, #32] @ encoding: [0x32,0x6a]
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@ CHECK: ldr r3, [r7, #124] @ encoding: [0xfb,0x6f]
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@ CHECK: ldr r1, [sp] @ encoding: [0x00,0x99]
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@ CHECK: ldr r2, [sp, #24] @ encoding: [0x06,0x9a]
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@ CHECK: ldr r3, [sp, #1020] @ encoding: [0xff,0x9b]
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@------------------------------------------------------------------------------
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@ LDR (literal)
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@------------------------------------------------------------------------------
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ldr r1, _foo
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@ CHECK: ldr r1, _foo @ encoding: [A,0x49]
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@ fixup A - offset: 0, value: _foo, kind: fixup_arm_thumb_cp
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@------------------------------------------------------------------------------
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@ LDR (register)
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@------------------------------------------------------------------------------
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ldr r1, [r2, r3]
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@ CHECK: ldr r1, [r2, r3] @ encoding: [0xd1,0x58]
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@------------------------------------------------------------------------------
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@ LDRB (immediate)
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@------------------------------------------------------------------------------
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ldrb r4, [r3]
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ldrb r5, [r6, #0]
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ldrb r6, [r7, #31]
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@ CHECK: ldrb r4, [r3] @ encoding: [0x1c,0x78]
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@ CHECK: ldrb r5, [r6] @ encoding: [0x35,0x78]
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@ CHECK: ldrb r6, [r7, #31] @ encoding: [0xfe,0x7f]
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@------------------------------------------------------------------------------
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@ LDRB (register)
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@------------------------------------------------------------------------------
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ldrb r6, [r4, r5]
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@ CHECK: ldrb r6, [r4, r5] @ encoding: [0x66,0x5d]
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@------------------------------------------------------------------------------
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@ LDRH (immediate)
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@------------------------------------------------------------------------------
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ldrh r3, [r3]
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ldrh r4, [r6, #2]
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ldrh r5, [r7, #62]
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@ CHECK: ldrh r3, [r3] @ encoding: [0x1b,0x88]
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@ CHECK: ldrh r4, [r6, #2] @ encoding: [0x74,0x88]
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@ CHECK: ldrh r5, [r7, #62] @ encoding: [0xfd,0x8f]
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@------------------------------------------------------------------------------
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@ LDRH (register)
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@------------------------------------------------------------------------------
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ldrh r6, [r2, r6]
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@ CHECK: ldrh r6, [r2, r6] @ encoding: [0x96,0x5b]
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@------------------------------------------------------------------------------
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@ LDRSB/LDRSH
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@------------------------------------------------------------------------------
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ldrsb r6, [r2, r6]
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ldrsh r3, [r7, r1]
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@ CHECK: ldrsb r6, [r2, r6] @ encoding: [0x96,0x57]
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@ CHECK: ldrsh r3, [r7, r1] @ encoding: [0x7b,0x5e]
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@------------------------------------------------------------------------------
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@ LSL (immediate)
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@------------------------------------------------------------------------------
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lsls r4, r5, #0
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lsls r4, r5, #4
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@ CHECK: lsls r4, r5, #0 @ encoding: [0x2c,0x00]
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@ CHECK: lsls r4, r5, #4 @ encoding: [0x2c,0x01]
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@------------------------------------------------------------------------------
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@ LSL (register)
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@------------------------------------------------------------------------------
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lsls r2, r6
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@ CHECK: lsls r2, r6 @ encoding: [0xb2,0x40]
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@------------------------------------------------------------------------------
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@ LSR (immediate)
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@------------------------------------------------------------------------------
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lsrs r1, r3, #1
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lsrs r1, r3, #32
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@ CHECK: lsrs r1, r3, #1 @ encoding: [0x59,0x08]
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@ CHECK: lsrs r1, r3, #32 @ encoding: [0x19,0x08]
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@------------------------------------------------------------------------------
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@ LSR (register)
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@------------------------------------------------------------------------------
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lsrs r2, r6
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@ CHECK: lsrs r2, r6 @ encoding: [0xf2,0x40]
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@------------------------------------------------------------------------------
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@ MOV (immediate)
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@------------------------------------------------------------------------------
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movs r2, #0
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movs r2, #255
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movs r2, #23
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@ CHECK: movs r2, #0 @ encoding: [0x00,0x22]
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@ CHECK: movs r2, #255 @ encoding: [0xff,0x22]
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@ CHECK: movs r2, #23 @ encoding: [0x17,0x22]
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@------------------------------------------------------------------------------
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@ MOV (register)
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@------------------------------------------------------------------------------
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mov r3, r4
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movs r1, r3
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@ CHECK: mov r3, r4 @ encoding: [0x23,0x46]
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@ CHECK: movs r1, r3 @ encoding: [0x19,0x00]
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