Dan Gohman 584fedf188 Teach two-address lowering how to unfold a load to open up commuting ... opportunities. For example, this lets it emit this: movq (%rax), %rcx addq %rdx, %rcx instead of this: movq %rdx, %rcx addq (%rax), %rcx in the case where %rdx has subsequent uses. It's the same number of instructions, and usually the same encoding size on x86, but it appears faster, and in general, it may allow better scheduling for the load. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106493 91177308-0d34-0410-b5e6-96231b3b80d8		2010-06-21 22:17:20 +00:00
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Alpha
ARM	Fix PR7421: bug in kill transferring logic. It was ignoring loads / stores which have already been processed.	2010-06-21 21:21:14 +00:00
Blackfin
CBackend
CellSPU	Add the check to the testcase of r106419.	2010-06-21 15:11:51 +00:00
CPP
Generic
MBlaze
Mips
MSP430
PIC16
PowerPC
SPARC
SystemZ
Thumb	Disable sibcall optimization for Thumb1 for now since Thumb1RegisterInfo::emitEpilogue is not expecting them.	2010-06-19 01:01:32 +00:00
Thumb2	Fix a crash caused by dereference of MBB.end(). rdar://8110842	2010-06-20 00:54:38 +00:00
X86	Teach two-address lowering how to unfold a load to open up commuting	2010-06-21 22:17:20 +00:00
XCore