mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-17 03:30:28 +00:00
bbbef49118
NOTE: This is a candidate for the Mesa stable branch. Reviewed-by: Tom Stellard <thomas.stellard at amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175445 91177308-0d34-0410-b5e6-96231b3b80d8
32 lines
1.2 KiB
TableGen
32 lines
1.2 KiB
TableGen
//===-- R600Intrinsics.td - R600 Instrinsic defs -------*- tablegen -*-----===//
|
|
//
|
|
// The LLVM Compiler Infrastructure
|
|
//
|
|
// This file is distributed under the University of Illinois Open Source
|
|
// License. See LICENSE.TXT for details.
|
|
//
|
|
//===----------------------------------------------------------------------===//
|
|
//
|
|
// R600 Intrinsic Definitions
|
|
//
|
|
//===----------------------------------------------------------------------===//
|
|
|
|
let TargetPrefix = "R600", isTarget = 1 in {
|
|
def int_R600_load_input :
|
|
Intrinsic<[llvm_float_ty], [llvm_i32_ty], [IntrNoMem]>;
|
|
def int_R600_interp_input :
|
|
Intrinsic<[llvm_float_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
|
|
def int_R600_load_texbuf :
|
|
Intrinsic<[llvm_v4f32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
|
|
def int_R600_store_swizzle :
|
|
Intrinsic<[], [llvm_v4f32_ty, llvm_i32_ty, llvm_i32_ty], []>;
|
|
def int_R600_store_stream_output :
|
|
Intrinsic<[], [llvm_v4f32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], []>;
|
|
def int_R600_store_pixel_depth :
|
|
Intrinsic<[], [llvm_float_ty], []>;
|
|
def int_R600_store_pixel_stencil :
|
|
Intrinsic<[], [llvm_float_ty], []>;
|
|
def int_R600_store_dummy :
|
|
Intrinsic<[], [llvm_i32_ty], []>;
|
|
}
|