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incorrect instruction sequence due to it not being aware that an inline assembly instruction may reference memory. This patch fixes the problem by causing the scheduler to always assume that any inline assembly code instruction could access memory. This is necessary because the internal representation of the inline instruction does not include any information about memory accesses. This should fix PR13504. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166929 91177308-0d34-0410-b5e6-96231b3b80d8
14 lines
328 B
LLVM
14 lines
328 B
LLVM
; PR13504
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; RUN: llc -march=x86 -mcpu=atom <%s | FileCheck %s
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; CHECK: bsfl
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; CHECK-NOT: movl
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define i32 @foo(i32 %treemap) nounwind uwtable {
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entry:
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%sub = sub i32 0, %treemap
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%and = and i32 %treemap, %sub
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%0 = tail call i32 asm "bsfl $1,$0\0A\09", "=r,rm,~{dirflag},~{fpsr},~{flags}"(i32 %and) nounwind
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ret i32 %0
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}
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