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cd52a7a381
Apparently, the style needs to be agreed upon first. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240390 91177308-0d34-0410-b5e6-96231b3b80d8
419 lines
15 KiB
C++
419 lines
15 KiB
C++
//===-- MipsELFObjectWriter.cpp - Mips ELF Writer -------------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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#include "MCTargetDesc/MipsBaseInfo.h"
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#include "MCTargetDesc/MipsFixupKinds.h"
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#include "MCTargetDesc/MipsMCTargetDesc.h"
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#include "llvm/ADT/STLExtras.h"
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#include "llvm/MC/MCAssembler.h"
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#include "llvm/MC/MCELFObjectWriter.h"
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#include "llvm/MC/MCExpr.h"
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#include "llvm/MC/MCSection.h"
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#include "llvm/MC/MCSymbolELF.h"
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#include "llvm/MC/MCValue.h"
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#include "llvm/Support/ErrorHandling.h"
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#include <list>
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using namespace llvm;
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namespace {
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// A helper structure based on ELFRelocationEntry, used for sorting entries in
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// the relocation table.
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struct MipsRelocationEntry {
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MipsRelocationEntry(const ELFRelocationEntry &R)
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: R(R), SortOffset(R.Offset), HasMatchingHi(false) {}
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const ELFRelocationEntry R;
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// SortOffset equals R.Offset except for the *HI16 relocations, for which it
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// will be set based on the R.Offset of the matching *LO16 relocation.
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int64_t SortOffset;
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// True when this is a *LO16 relocation chosen as a match for a *HI16
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// relocation.
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bool HasMatchingHi;
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};
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class MipsELFObjectWriter : public MCELFObjectTargetWriter {
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public:
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MipsELFObjectWriter(bool _is64Bit, uint8_t OSABI,
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bool _isN64, bool IsLittleEndian);
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~MipsELFObjectWriter() override;
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unsigned GetRelocType(const MCValue &Target, const MCFixup &Fixup,
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bool IsPCRel) const override;
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bool needsRelocateWithSymbol(const MCSymbol &Sym,
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unsigned Type) const override;
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virtual void sortRelocs(const MCAssembler &Asm,
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std::vector<ELFRelocationEntry> &Relocs) override;
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};
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}
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MipsELFObjectWriter::MipsELFObjectWriter(bool _is64Bit, uint8_t OSABI,
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bool _isN64, bool IsLittleEndian)
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: MCELFObjectTargetWriter(_is64Bit, OSABI, ELF::EM_MIPS,
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/*HasRelocationAddend*/ _isN64,
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/*IsN64*/ _isN64) {}
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MipsELFObjectWriter::~MipsELFObjectWriter() {}
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unsigned MipsELFObjectWriter::GetRelocType(const MCValue &Target,
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const MCFixup &Fixup,
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bool IsPCRel) const {
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// Determine the type of the relocation.
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unsigned Kind = (unsigned)Fixup.getKind();
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switch (Kind) {
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case Mips::fixup_Mips_16:
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case FK_Data_2:
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return IsPCRel ? ELF::R_MIPS_PC16 : ELF::R_MIPS_16;
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case Mips::fixup_Mips_32:
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case FK_Data_4:
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return IsPCRel ? ELF::R_MIPS_PC32 : ELF::R_MIPS_32;
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}
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if (IsPCRel) {
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switch (Kind) {
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case Mips::fixup_Mips_Branch_PCRel:
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case Mips::fixup_Mips_PC16:
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return ELF::R_MIPS_PC16;
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case Mips::fixup_MICROMIPS_PC7_S1:
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return ELF::R_MICROMIPS_PC7_S1;
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case Mips::fixup_MICROMIPS_PC10_S1:
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return ELF::R_MICROMIPS_PC10_S1;
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case Mips::fixup_MICROMIPS_PC16_S1:
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return ELF::R_MICROMIPS_PC16_S1;
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case Mips::fixup_MIPS_PC19_S2:
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return ELF::R_MIPS_PC19_S2;
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case Mips::fixup_MIPS_PC18_S3:
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return ELF::R_MIPS_PC18_S3;
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case Mips::fixup_MIPS_PC21_S2:
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return ELF::R_MIPS_PC21_S2;
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case Mips::fixup_MIPS_PC26_S2:
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return ELF::R_MIPS_PC26_S2;
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case Mips::fixup_MIPS_PCHI16:
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return ELF::R_MIPS_PCHI16;
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case Mips::fixup_MIPS_PCLO16:
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return ELF::R_MIPS_PCLO16;
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}
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llvm_unreachable("invalid PC-relative fixup kind!");
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}
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switch (Kind) {
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case Mips::fixup_Mips_64:
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case FK_Data_8:
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return ELF::R_MIPS_64;
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case FK_GPRel_4:
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if (isN64()) {
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unsigned Type = (unsigned)ELF::R_MIPS_NONE;
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Type = setRType((unsigned)ELF::R_MIPS_GPREL32, Type);
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Type = setRType2((unsigned)ELF::R_MIPS_64, Type);
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Type = setRType3((unsigned)ELF::R_MIPS_NONE, Type);
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return Type;
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}
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return ELF::R_MIPS_GPREL32;
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case Mips::fixup_Mips_GPREL16:
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return ELF::R_MIPS_GPREL16;
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case Mips::fixup_Mips_26:
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return ELF::R_MIPS_26;
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case Mips::fixup_Mips_CALL16:
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return ELF::R_MIPS_CALL16;
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case Mips::fixup_Mips_GOT_Global:
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case Mips::fixup_Mips_GOT_Local:
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return ELF::R_MIPS_GOT16;
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case Mips::fixup_Mips_HI16:
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return ELF::R_MIPS_HI16;
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case Mips::fixup_Mips_LO16:
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return ELF::R_MIPS_LO16;
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case Mips::fixup_Mips_TLSGD:
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return ELF::R_MIPS_TLS_GD;
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case Mips::fixup_Mips_GOTTPREL:
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return ELF::R_MIPS_TLS_GOTTPREL;
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case Mips::fixup_Mips_TPREL_HI:
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return ELF::R_MIPS_TLS_TPREL_HI16;
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case Mips::fixup_Mips_TPREL_LO:
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return ELF::R_MIPS_TLS_TPREL_LO16;
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case Mips::fixup_Mips_TLSLDM:
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return ELF::R_MIPS_TLS_LDM;
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case Mips::fixup_Mips_DTPREL_HI:
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return ELF::R_MIPS_TLS_DTPREL_HI16;
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case Mips::fixup_Mips_DTPREL_LO:
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return ELF::R_MIPS_TLS_DTPREL_LO16;
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case Mips::fixup_Mips_GOT_PAGE:
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return ELF::R_MIPS_GOT_PAGE;
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case Mips::fixup_Mips_GOT_OFST:
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return ELF::R_MIPS_GOT_OFST;
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case Mips::fixup_Mips_GOT_DISP:
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return ELF::R_MIPS_GOT_DISP;
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case Mips::fixup_Mips_GPOFF_HI: {
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unsigned Type = (unsigned)ELF::R_MIPS_NONE;
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Type = setRType((unsigned)ELF::R_MIPS_GPREL16, Type);
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Type = setRType2((unsigned)ELF::R_MIPS_SUB, Type);
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Type = setRType3((unsigned)ELF::R_MIPS_HI16, Type);
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return Type;
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}
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case Mips::fixup_Mips_GPOFF_LO: {
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unsigned Type = (unsigned)ELF::R_MIPS_NONE;
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Type = setRType((unsigned)ELF::R_MIPS_GPREL16, Type);
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Type = setRType2((unsigned)ELF::R_MIPS_SUB, Type);
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Type = setRType3((unsigned)ELF::R_MIPS_LO16, Type);
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return Type;
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}
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case Mips::fixup_Mips_HIGHER:
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return ELF::R_MIPS_HIGHER;
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case Mips::fixup_Mips_HIGHEST:
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return ELF::R_MIPS_HIGHEST;
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case Mips::fixup_Mips_GOT_HI16:
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return ELF::R_MIPS_GOT_HI16;
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case Mips::fixup_Mips_GOT_LO16:
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return ELF::R_MIPS_GOT_LO16;
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case Mips::fixup_Mips_CALL_HI16:
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return ELF::R_MIPS_CALL_HI16;
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case Mips::fixup_Mips_CALL_LO16:
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return ELF::R_MIPS_CALL_LO16;
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case Mips::fixup_MICROMIPS_26_S1:
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return ELF::R_MICROMIPS_26_S1;
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case Mips::fixup_MICROMIPS_HI16:
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return ELF::R_MICROMIPS_HI16;
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case Mips::fixup_MICROMIPS_LO16:
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return ELF::R_MICROMIPS_LO16;
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case Mips::fixup_MICROMIPS_GOT16:
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return ELF::R_MICROMIPS_GOT16;
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case Mips::fixup_MICROMIPS_CALL16:
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return ELF::R_MICROMIPS_CALL16;
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case Mips::fixup_MICROMIPS_GOT_DISP:
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return ELF::R_MICROMIPS_GOT_DISP;
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case Mips::fixup_MICROMIPS_GOT_PAGE:
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return ELF::R_MICROMIPS_GOT_PAGE;
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case Mips::fixup_MICROMIPS_GOT_OFST:
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return ELF::R_MICROMIPS_GOT_OFST;
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case Mips::fixup_MICROMIPS_TLS_GD:
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return ELF::R_MICROMIPS_TLS_GD;
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case Mips::fixup_MICROMIPS_TLS_LDM:
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return ELF::R_MICROMIPS_TLS_LDM;
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case Mips::fixup_MICROMIPS_TLS_DTPREL_HI16:
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return ELF::R_MICROMIPS_TLS_DTPREL_HI16;
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case Mips::fixup_MICROMIPS_TLS_DTPREL_LO16:
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return ELF::R_MICROMIPS_TLS_DTPREL_LO16;
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case Mips::fixup_MICROMIPS_TLS_TPREL_HI16:
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return ELF::R_MICROMIPS_TLS_TPREL_HI16;
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case Mips::fixup_MICROMIPS_TLS_TPREL_LO16:
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return ELF::R_MICROMIPS_TLS_TPREL_LO16;
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}
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llvm_unreachable("invalid fixup kind!");
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}
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// Sort entries by SortOffset in descending order.
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// When there are more *HI16 relocs paired with one *LO16 reloc, the 2nd rule
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// sorts them in ascending order of R.Offset.
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static int cmpRelMips(const MipsRelocationEntry *AP,
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const MipsRelocationEntry *BP) {
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const MipsRelocationEntry &A = *AP;
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const MipsRelocationEntry &B = *BP;
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if (A.SortOffset != B.SortOffset)
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return B.SortOffset - A.SortOffset;
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if (A.R.Offset != B.R.Offset)
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return A.R.Offset - B.R.Offset;
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if (B.R.Type != A.R.Type)
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return B.R.Type - A.R.Type;
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//llvm_unreachable("ELFRelocs might be unstable!");
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return 0;
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}
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// For the given Reloc.Type, return the matching relocation type, as in the
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// table below.
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static unsigned getMatchingLoType(const MCAssembler &Asm,
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const ELFRelocationEntry &Reloc) {
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unsigned Type = Reloc.Type;
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if (Type == ELF::R_MIPS_HI16)
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return ELF::R_MIPS_LO16;
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if (Type == ELF::R_MICROMIPS_HI16)
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return ELF::R_MICROMIPS_LO16;
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if (Type == ELF::R_MIPS16_HI16)
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return ELF::R_MIPS16_LO16;
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if (Reloc.Symbol->getBinding() != ELF::STB_LOCAL)
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return ELF::R_MIPS_NONE;
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if (Type == ELF::R_MIPS_GOT16)
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return ELF::R_MIPS_LO16;
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if (Type == ELF::R_MICROMIPS_GOT16)
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return ELF::R_MICROMIPS_LO16;
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if (Type == ELF::R_MIPS16_GOT16)
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return ELF::R_MIPS16_LO16;
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return ELF::R_MIPS_NONE;
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}
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// Return true if First needs a matching *LO16, its matching *LO16 type equals
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// Second's type and both relocations are against the same symbol.
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static bool areMatchingHiAndLo(const MCAssembler &Asm,
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const ELFRelocationEntry &First,
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const ELFRelocationEntry &Second) {
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return getMatchingLoType(Asm, First) != ELF::R_MIPS_NONE &&
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getMatchingLoType(Asm, First) == Second.Type &&
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First.Symbol && First.Symbol == Second.Symbol;
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}
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// Return true if MipsRelocs[Index] is a *LO16 preceded by a matching *HI16.
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static bool
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isPrecededByMatchingHi(const MCAssembler &Asm, uint32_t Index,
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std::vector<MipsRelocationEntry> &MipsRelocs) {
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return Index < MipsRelocs.size() - 1 &&
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areMatchingHiAndLo(Asm, MipsRelocs[Index + 1].R, MipsRelocs[Index].R);
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}
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// Return true if MipsRelocs[Index] is a *LO16 not preceded by a matching *HI16
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// and not chosen by a *HI16 as a match.
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static bool isFreeLo(const MCAssembler &Asm, uint32_t Index,
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std::vector<MipsRelocationEntry> &MipsRelocs) {
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return Index < MipsRelocs.size() && !MipsRelocs[Index].HasMatchingHi &&
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!isPrecededByMatchingHi(Asm, Index, MipsRelocs);
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}
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// Lo is chosen as a match for Hi, set their fields accordingly.
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// Mips instructions have fixed length of at least two bytes (two for
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// micromips/mips16, four for mips32/64), so we can set HI's SortOffset to
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// matching LO's Offset minus one to simplify the sorting function.
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static void setMatch(MipsRelocationEntry &Hi, MipsRelocationEntry &Lo) {
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Lo.HasMatchingHi = true;
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Hi.SortOffset = Lo.R.Offset - 1;
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}
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// We sort relocation table entries by offset, except for one additional rule
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// required by MIPS ABI: every *HI16 relocation must be immediately followed by
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// the corresponding *LO16 relocation. We also support a GNU extension that
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// allows more *HI16s paired with one *LO16.
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//
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// *HI16 relocations and their matching *LO16 are:
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//
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// +---------------------------------------------+-------------------+
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// | *HI16 | matching *LO16 |
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// |---------------------------------------------+-------------------|
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// | R_MIPS_HI16, local R_MIPS_GOT16 | R_MIPS_LO16 |
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// | R_MICROMIPS_HI16, local R_MICROMIPS_GOT16 | R_MICROMIPS_LO16 |
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// | R_MIPS16_HI16, local R_MIPS16_GOT16 | R_MIPS16_LO16 |
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// +---------------------------------------------+-------------------+
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//
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// (local R_*_GOT16 meaning R_*_GOT16 against the local symbol.)
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//
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// To handle *HI16 and *LO16 relocations, the linker needs a combined addend
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// ("AHL") calculated from both *HI16 ("AHI") and *LO16 ("ALO") relocations:
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// AHL = (AHI << 16) + (short)ALO;
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//
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// We are reusing gnu as sorting algorithm so we are emitting the relocation
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// table sorted the same way as gnu as would sort it, for easier comparison of
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// the generated .o files.
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//
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// The logic is:
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// search the table (starting from the highest offset and going back to zero)
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// for all *HI16 relocations that don't have a matching *LO16.
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// For every such HI, find a matching LO with highest offset that isn't already
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// matched with another HI. If there are no free LOs, match it with the first
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// found (starting from lowest offset).
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// When there are more HIs matched with one LO, sort them in descending order by
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// offset.
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//
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// In other words, when searching for a matching LO:
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// - don't look for a 'better' match for the HIs that are already followed by a
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// matching LO;
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// - prefer LOs without a pair;
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// - prefer LOs with higher offset;
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void MipsELFObjectWriter::sortRelocs(const MCAssembler &Asm,
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std::vector<ELFRelocationEntry> &Relocs) {
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if (Relocs.size() < 2)
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return;
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// The default function sorts entries by Offset in descending order.
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MCELFObjectTargetWriter::sortRelocs(Asm, Relocs);
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// Init MipsRelocs from Relocs.
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std::vector<MipsRelocationEntry> MipsRelocs;
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for (unsigned I = 0, E = Relocs.size(); I != E; ++I)
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MipsRelocs.push_back(MipsRelocationEntry(Relocs[I]));
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// Find a matching LO for all HIs that need it.
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for (int32_t I = 0, E = MipsRelocs.size(); I != E; ++I) {
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if (getMatchingLoType(Asm, MipsRelocs[I].R) == ELF::R_MIPS_NONE ||
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(I > 0 && isPrecededByMatchingHi(Asm, I - 1, MipsRelocs)))
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continue;
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int32_t MatchedLoIndex = -1;
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// Search the list in the ascending order of Offset.
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for (int32_t J = MipsRelocs.size() - 1, N = -1; J != N; --J) {
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// check for a match
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if (areMatchingHiAndLo(Asm, MipsRelocs[I].R, MipsRelocs[J].R) &&
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(MatchedLoIndex == -1 || // first match
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// or we already have a match,
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// but this one is with higher offset and it's free
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(MatchedLoIndex > J && isFreeLo(Asm, J, MipsRelocs))))
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MatchedLoIndex = J;
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}
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if (MatchedLoIndex != -1)
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// We have a match.
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setMatch(MipsRelocs[I], MipsRelocs[MatchedLoIndex]);
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}
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// SortOffsets are calculated, call the sorting function.
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array_pod_sort(MipsRelocs.begin(), MipsRelocs.end(), cmpRelMips);
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// Copy sorted MipsRelocs back to Relocs.
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for (unsigned I = 0, E = MipsRelocs.size(); I != E; ++I)
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Relocs[I] = MipsRelocs[I].R;
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}
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bool MipsELFObjectWriter::needsRelocateWithSymbol(const MCSymbol &Sym,
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unsigned Type) const {
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// FIXME: This is extremely conservative. This really needs to use a
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// whitelist with a clear explanation for why each realocation needs to
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// point to the symbol, not to the section.
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switch (Type) {
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default:
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return true;
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case ELF::R_MIPS_GOT16:
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case ELF::R_MIPS16_GOT16:
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case ELF::R_MICROMIPS_GOT16:
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llvm_unreachable("Should have been handled already");
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// These relocations might be paired with another relocation. The pairing is
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// done by the static linker by matching the symbol. Since we only see one
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// relocation at a time, we have to force them to relocate with a symbol to
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// avoid ending up with a pair where one points to a section and another
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// points to a symbol.
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case ELF::R_MIPS_HI16:
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case ELF::R_MIPS16_HI16:
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case ELF::R_MICROMIPS_HI16:
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case ELF::R_MIPS_LO16:
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case ELF::R_MIPS16_LO16:
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case ELF::R_MICROMIPS_LO16:
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return true;
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case ELF::R_MIPS_32:
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if (cast<MCSymbolELF>(Sym).getOther() & ELF::STO_MIPS_MICROMIPS)
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return true;
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// falltrough
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case ELF::R_MIPS_26:
|
|
case ELF::R_MIPS_64:
|
|
case ELF::R_MIPS_GPREL16:
|
|
return false;
|
|
}
|
|
}
|
|
|
|
MCObjectWriter *llvm::createMipsELFObjectWriter(raw_pwrite_stream &OS,
|
|
uint8_t OSABI,
|
|
bool IsLittleEndian,
|
|
bool Is64Bit) {
|
|
MCELFObjectTargetWriter *MOTW =
|
|
new MipsELFObjectWriter(Is64Bit, OSABI, Is64Bit, IsLittleEndian);
|
|
return createELFObjectWriter(MOTW, OS, IsLittleEndian);
|
|
}
|