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7c9c6ed761
Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
67 lines
2.3 KiB
LLVM
67 lines
2.3 KiB
LLVM
; RUN: opt < %s -msan -msan-check-access-address=0 -S | FileCheck %s
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target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
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target triple = "x86_64-unknown-linux-gnu"
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declare i32 @llvm.x86.sse2.cvtsd2si(<2 x double>) nounwind readnone
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declare <2 x double> @llvm.x86.sse2.cvtsi2sd(<2 x double>, i32) nounwind readnone
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declare x86_mmx @llvm.x86.sse.cvtps2pi(<4 x float>) nounwind readnone
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; Single argument vector conversion.
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define i32 @test_cvtsd2si(<2 x double> %value) sanitize_memory {
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entry:
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%0 = tail call i32 @llvm.x86.sse2.cvtsd2si(<2 x double> %value)
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ret i32 %0
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}
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; CHECK: @test_cvtsd2si
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; CHECK: [[S:%[_01-9a-z]+]] = extractelement <2 x i64> {{.*}}, i32 0
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; CHECK: icmp ne {{.*}}[[S]], 0
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; CHECK: br
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; CHECK: call void @__msan_warning_noreturn
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; CHECK: call i32 @llvm.x86.sse2.cvtsd2si
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; CHECK: store i32 0, {{.*}} @__msan_retval_tls
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; CHECK: ret i32
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; Two-argument vector conversion.
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define <2 x double> @test_cvtsi2sd(i32 %a, double %b) sanitize_memory {
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entry:
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%vec = insertelement <2 x double> undef, double %b, i32 1
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%0 = tail call <2 x double> @llvm.x86.sse2.cvtsi2sd(<2 x double> %vec, i32 %a)
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ret <2 x double> %0
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}
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; CHECK: @test_cvtsi2sd
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; CHECK: [[Sa:%[_01-9a-z]+]] = load i32, i32* {{.*}} @__msan_param_tls
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; CHECK: [[Sout0:%[_01-9a-z]+]] = insertelement <2 x i64> <i64 -1, i64 -1>, i64 {{.*}}, i32 1
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; Clear low half of result shadow
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; CHECK: [[Sout:%[_01-9a-z]+]] = insertelement <2 x i64> {{.*}}[[Sout0]], i64 0, i32 0
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; Trap on %a shadow.
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; CHECK: icmp ne {{.*}}[[Sa]], 0
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; CHECK: br
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; CHECK: call void @__msan_warning_noreturn
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; CHECK: call <2 x double> @llvm.x86.sse2.cvtsi2sd
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; CHECK: store <2 x i64> {{.*}}[[Sout]], {{.*}} @__msan_retval_tls
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; CHECK: ret <2 x double>
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; x86_mmx packed vector conversion.
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define x86_mmx @test_cvtps2pi(<4 x float> %value) sanitize_memory {
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entry:
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%0 = tail call x86_mmx @llvm.x86.sse.cvtps2pi(<4 x float> %value)
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ret x86_mmx %0
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}
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; CHECK: @test_cvtps2pi
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; CHECK: extractelement <4 x i32> {{.*}}, i32 0
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; CHECK: extractelement <4 x i32> {{.*}}, i32 1
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; CHECK: [[S:%[_01-9a-z]+]] = or i32
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; CHECK: icmp ne {{.*}}[[S]], 0
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; CHECK: br
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; CHECK: call void @__msan_warning_noreturn
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; CHECK: call x86_mmx @llvm.x86.sse.cvtps2pi
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; CHECK: store i64 0, {{.*}} @__msan_retval_tls
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; CHECK: ret x86_mmx
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