llvm-6502/test/MC
Hao Liu 591c2f738a Implement AArch64 post-index vector load/store multiple N-element structure class SIMD(lselem-post).
Including following 14 instructions:
4 ld1 insts: post-index load multiple 1-element structure to sequential 1/2/3/4 registers.
ld2/ld3/ld4: post-index load multiple N-element structure to sequential N registers (N=2,3,4).
4 st1 insts: post-index store multiple 1-element structure from sequential 1/2/3/4 registers.
st2/st3/st4: post-index store multiple N-element structure from sequential N registers (N = 2,3,4).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194043 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-05 03:39:32 +00:00
..
AArch64 Implement AArch64 post-index vector load/store multiple N-element structure class SIMD(lselem-post). 2013-11-05 03:39:32 +00:00
ARM Test cleanup for v8 instructions 2013-10-29 14:16:09 +00:00
AsmParser MCParser/Debug info: Accept line number 0 as a legitimate value, since 2013-09-26 23:37:11 +00:00
COFF MC asm parser: allow ?'s in symbol names, and handle @'s in names in MS asm 2013-10-18 20:46:28 +00:00
Disassembler Implement AArch64 post-index vector load/store multiple N-element structure class SIMD(lselem-post). 2013-11-05 03:39:32 +00:00
ELF This commit adds some (but not all) of the x86-64 relocations that are not 2013-10-30 18:47:25 +00:00
MachO Add test I forgot to git add in r191824. 2013-10-02 14:49:41 +00:00
Markup MC: Simple example parser for MC assembly markup. 2012-10-31 23:24:13 +00:00
Mips Support for microMIPS branch instructions. 2013-11-04 14:53:22 +00:00
PowerPC Convert another llc -filetype=obj test. 2013-10-28 22:17:19 +00:00
SystemZ [SystemZ] Add comparisons of high words and memory 2013-10-01 15:00:44 +00:00
X86 Allow pinsrw/pinsrb/pextrb/pextrw/movmskps/movmskpd/pmovmskb/extractps instructions to parse either GR32 or GR64 without resorting to duplicating instructions. 2013-10-14 04:55:01 +00:00