Chris Lattner 0a9481f44f Enhance ComputeMaskedBits to know that aligned frameindexes ... have their low bits set to zero. This allows us to optimize out explicit stack alignment code like in stack-align.ll:test4 when it is redundant. Doing this causes the code generator to start turning FI+cst into FI|cst all over the place, which is general goodness (that is the canonical form) except that various pieces of the code generator don't handle OR aggressively. Fix this by introducing a new SelectionDAG::isBaseWithConstantOffset predicate, and using it in places that are looking for ADD(X,CST). The ARM backend in particular was missing a lot of addressing mode folding opportunities around OR. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125470 91177308-0d34-0410-b5e6-96231b3b80d8		2011-02-13 22:25:43 +00:00
..
2009-05-10-CyclicDAG.ll
2009-05-17-Rot.ll	add newlines at the end of files.	2010-04-07 22:53:17 +00:00
2009-05-17-Shift.ll	add newlines at the end of files.	2010-04-07 22:53:17 +00:00
2009-05-19-DoubleSplit.ll
2009-08-25-DynamicStackAlloc.ll
2009-09-18-AbsoluteAddr.ll
2009-10-10-OrImpDef.ll
2009-11-05-8BitLibcalls.ll
2009-11-08-InvalidResNo.ll
2009-11-20-NewNode.ll
2009-12-21-FrameAddr.ll	Add testcase for PR5703	2009-12-22 22:37:23 +00:00
2009-12-22-InlineAsm.ll	Use more sensible type for flags in asms. PR 5570.	2009-12-23 07:32:51 +00:00
2010-04-07-DbgValueOtherTargets.ll	If dbg_declare() or dbg_value() is not lowered by isel then emit DEBUG message instead of creating DBG_VALUE for undefined value in reg0.	2010-12-06 22:39:26 +00:00
2010-05-01-CombinerAnd.ll	Insert ANY_EXTEND node instead of invalid truncate during DAG Combining (X & 1),	2010-05-01 12:52:34 +00:00
AddrMode-bis-rx.ll	Do not use '&' prefix for globals when register base field is non-zero, otherwise msp430-as will silently miscompile the code (TI's assembler report an error though).	2010-03-06 11:41:12 +00:00
AddrMode-bis-xr.ll	Do not use '&' prefix for globals when register base field is non-zero, otherwise msp430-as will silently miscompile the code (TI's assembler report an error though).	2010-03-06 11:41:12 +00:00
AddrMode-mov-rx.ll	Do not use '&' prefix for globals when register base field is non-zero, otherwise msp430-as will silently miscompile the code (TI's assembler report an error though).	2010-03-06 11:41:12 +00:00
AddrMode-mov-xr.ll	Do not use '&' prefix for globals when register base field is non-zero, otherwise msp430-as will silently miscompile the code (TI's assembler report an error though).	2010-03-06 11:41:12 +00:00
bit.ll	no need to run llvm-as here.	2010-02-22 23:34:12 +00:00
dg.exp
indirectbr2.ll	Do folding for indirect branches, where possible	2010-05-01 12:28:21 +00:00
indirectbr.ll	Implement indirect branches on MSP430	2010-05-01 12:04:32 +00:00
inline-asm.ll
Inst8mi.ll
Inst8mm.ll
Inst8mr.ll
Inst8ri.ll
Inst8rm.ll
Inst8rr.ll	Change the scheduler from adding nodes in allnodes order	2010-02-24 06:11:37 +00:00
Inst16mi.ll
Inst16mm.ll	Enhance ComputeMaskedBits to know that aligned frameindexes	2011-02-13 22:25:43 +00:00
Inst16mr.ll
Inst16ri.ll
Inst16rm.ll
Inst16rr.ll
mult-alt-generic-msp430.ll	Inline asm mult-alt constraint tests.	2010-11-02 23:01:44 +00:00
postinc.ll
setcc.ll	IT turns out that during jumpless setcc lowering eq and ne were swapped.	2010-02-21 12:28:58 +00:00
shifts.ll	Add variable-width shifts for MSP430	2010-01-14 22:09:38 +00:00