llvm-6502/test/CodeGen
Hal Finkel d7b2788e51 [PowerPC] [FastISel] i1 constants must be zero extended
When materializing constant i1 values, they must be zero extended. We represent
i1 values as [0, 1], not [0, -1], in i32 registers. As it turns out, this code
path was dead for i1 values prior to r216006 (which is why this did not manifest in
miscompiles until recently).

Fixes -O0 self-hosting on PPC64/Linux.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224842 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-25 23:08:25 +00:00
..
AArch64
ARM [ARM] Don't break alignment when combining base updates into load/stores. 2014-12-23 06:07:31 +00:00
CPP
Generic
Hexagon [Hexagon] Reapplying 224775 load words. 2014-12-23 20:02:16 +00:00
Inputs
Mips
MSP430
NVPTX
PowerPC [PowerPC] [FastISel] i1 constants must be zero extended 2014-12-25 23:08:25 +00:00
R600
SPARC
SystemZ
Thumb
Thumb2
X86 Masked Load/Store - Changed the order of parameters in intrinsics. 2014-12-25 07:49:20 +00:00
XCore