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https://github.com/c64scene-ar/llvm-6502.git
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82db274d15
This patch implements two things:
1. If we know one number is positive and another is negative, we return true as
signed addition of two opposite signed numbers will never overflow.
2. Implemented TODO : If one of the operands only has one non-zero bit, and if
the other operand has a known-zero bit in a more significant place than it
(not including the sign bit) the ripple may go up to and fill the zero, but
won't change the sign. e.x - (x & ~4) + 1
We make sure that we are ignoring 0 at MSB.
Patch by Suyog Sarda.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210186 91177308-0d34-0410-b5e6-96231b3b80d8
59 lines
1.2 KiB
LLVM
59 lines
1.2 KiB
LLVM
; RUN: opt < %s -instcombine -S | FileCheck %s
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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; CHECK-LABEL: @oppositesign
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; CHECK: add nsw i16 %a, %b
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define i16 @oppositesign(i16 %x, i16 %y) {
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; %a is negative, %b is positive
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%a = or i16 %x, 32768
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%b = and i16 %y, 32767
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%c = add i16 %a, %b
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ret i16 %c
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}
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; CHECK-LABEL: @ripple_nsw1
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; CHECK: add nsw i16 %a, %b
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define i16 @ripple_nsw1(i16 %x, i16 %y) {
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; %a has at most one bit set
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%a = and i16 %y, 1
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; %b has a 0 bit other than the sign bit
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%b = and i16 %x, 49151
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%c = add i16 %a, %b
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ret i16 %c
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}
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; Like the previous test, but flip %a and %b
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; CHECK-LABEL: @ripple_nsw2
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; CHECK: add nsw i16 %b, %a
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define i16 @ripple_nsw2(i16 %x, i16 %y) {
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%a = and i16 %y, 1
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%b = and i16 %x, 49151
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%c = add i16 %b, %a
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ret i16 %c
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}
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; CHECK-LABEL: @ripple_no_nsw1
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; CHECK: add i32 %a, %x
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define i32 @ripple_no_nsw1(i32 %x, i32 %y) {
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; We know nothing about %x
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%a = and i32 %y, 1
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%b = add i32 %a, %x
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ret i32 %b
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}
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; CHECK-LABEL: @ripple_no_nsw2
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; CHECK: add i16 %a, %b
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define i16 @ripple_no_nsw2(i16 %x, i16 %y) {
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; %a has at most one bit set
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%a = and i16 %y, 1
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; %b has a 0 bit, but it is the sign bit
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%b = and i16 %x, 32767
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%c = add i16 %a, %b
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ret i16 %c
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}
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