mirror of
https://github.com/c64scene-ar/llvm-6502.git
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a01b583dbc
The default calling convention specified by the PPC64 ELF (V1 and V2) ABI is designed to work with both prototyped and non-prototyped/varargs functions. As a result, GPRs and stack space are allocated for every argument, even those that are passed in floating-point or vector registers. GlobalOpt::OptimizeFunctions will transform local non-varargs functions (that do not have their address taken) to use the 'fast' calling convention. When functions are using the 'fast' calling convention, don't allocate GPRs for arguments passed in other types of registers, and don't allocate stack space for arguments passed in registers. Other changes for the fast calling convention may be added in the future. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226399 91177308-0d34-0410-b5e6-96231b3b80d8
57 lines
1.3 KiB
LLVM
57 lines
1.3 KiB
LLVM
; RUN: llc -mcpu=pwr7 -mattr=-vsx -fast-isel -fast-isel-abort < %s | FileCheck %s
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target datalayout = "E-m:e-i64:64-n32:64"
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target triple = "powerpc64-unknown-linux-gnu"
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define fastcc i64 @g1(i64 %g1, double %f1, i64 %g2, double %f2, i64 %g3, double %f3, i64 %g4, double %f4) #0 {
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ret i64 %g1
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; CHECK-LABEL: @g1
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; CHECK-NOT: mr 3,
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; CHECK: blr
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}
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define fastcc i64 @g2(i64 %g1, double %f1, i64 %g2, double %f2, i64 %g3, double %f3, i64 %g4, double %f4) #0 {
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ret i64 %g2
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; CHECK-LABEL: @g2
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; CHECK: mr 3, 4
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; CHECK-NEXT: blr
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}
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define fastcc i64 @g3(i64 %g1, double %f1, i64 %g2, double %f2, i64 %g3, double %f3, i64 %g4, double %f4) #0 {
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ret i64 %g3
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; CHECK-LABEL: @g3
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; CHECK: mr 3, 5
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; CHECK-NEXT: blr
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}
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define fastcc double @f2(i64 %g1, double %f1, i64 %g2, double %f2, i64 %g3, double %f3, i64 %g4, double %f4) #0 {
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ret double %f2
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; CHECK-LABEL: @f2
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; CHECK: fmr 1, 2
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; CHECK-NEXT: blr
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}
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define void @cg2(i64 %v) #0 {
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tail call fastcc i64 @g1(i64 0, double 0.0, i64 %v, double 0.0, i64 0, double 0.0, i64 0, double 0.0)
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ret void
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; CHECK-LABEL: @cg2
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; CHECK: mr 4, 3
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; CHECK: blr
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}
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define void @cf2(double %v) #0 {
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tail call fastcc i64 @g1(i64 0, double 0.0, i64 0, double %v, i64 0, double 0.0, i64 0, double 0.0)
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ret void
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; CHECK-LABEL: @cf2
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; CHECK: mr 2, 1
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; CHECK: blr
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}
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attributes #0 = { nounwind }
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