Evan Cheng e2471a9169 If SSE2 is available, x86 should pass first 3 f32/f64 arguments in XMM registers for fastcc calls. ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55840 91177308-0d34-0410-b5e6-96231b3b80d8		2008-09-05 17:24:07 +00:00
..
Alpha	allow this to pass.	2008-08-29 17:18:26 +00:00
ARM	It's not legal to output a GV in a coalesced section if it's used in an ARM PIC relative constantpool.	2008-08-08 06:56:16 +00:00
CBackend
CellSPU	Revert the "XFAIL" for the rotate_ops.ll testcase. Instead, mark ISD::ROTR	2008-08-31 02:59:23 +00:00
CPP
Generic	Turn this legalize types test on.	2008-09-01 12:00:55 +00:00
IA64
Mips	Support added for ctlz intrinsic, test case added.	2008-08-08 06:16:31 +00:00
PowerPC	Testcases for ppc atomics.	2008-08-30 00:54:31 +00:00
SPARC
X86	If SSE2 is available, x86 should pass first 3 f32/f64 arguments in XMM registers for fastcc calls.	2008-09-05 17:24:07 +00:00