mirror of
https://github.com/c64scene-ar/llvm-6502.git
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b74c865841
argument value type. Otherwise, the sign/zero-extend has no effect on arguments passed via the stack (i.e., undefined high-order bits). rdar://10515467 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145701 91177308-0d34-0410-b5e6-96231b3b80d8
129 lines
2.9 KiB
LLVM
129 lines
2.9 KiB
LLVM
; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-apple-darwin | FileCheck %s --check-prefix=ARM
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; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-darwin | FileCheck %s --check-prefix=THUMB
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define i32 @t0(i1 zeroext %a) nounwind {
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%1 = zext i1 %a to i32
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ret i32 %1
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}
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define i32 @t1(i8 signext %a) nounwind {
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%1 = sext i8 %a to i32
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ret i32 %1
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}
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define i32 @t2(i8 zeroext %a) nounwind {
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%1 = zext i8 %a to i32
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ret i32 %1
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}
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define i32 @t3(i16 signext %a) nounwind {
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%1 = sext i16 %a to i32
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ret i32 %1
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}
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define i32 @t4(i16 zeroext %a) nounwind {
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%1 = zext i16 %a to i32
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ret i32 %1
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}
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define void @foo(i8 %a, i16 %b) nounwind {
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; ARM: foo
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; THUMB: foo
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;; Materialize i1 1
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; ARM: movw r2, #1
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;; zero-ext
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; ARM: and r2, r2, #1
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; THUMB: and r2, r2, #1
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%1 = call i32 @t0(i1 zeroext 1)
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; ARM: sxtb r2, r1
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; ARM: mov r0, r2
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; THUMB: sxtb r2, r1
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; THUMB: mov r0, r2
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%2 = call i32 @t1(i8 signext %a)
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; ARM: uxtb r2, r1
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; ARM: mov r0, r2
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; THUMB: uxtb r2, r1
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; THUMB: mov r0, r2
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%3 = call i32 @t2(i8 zeroext %a)
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; ARM: sxth r2, r1
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; ARM: mov r0, r2
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; THUMB: sxth r2, r1
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; THUMB: mov r0, r2
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%4 = call i32 @t3(i16 signext %b)
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; ARM: uxth r2, r1
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; ARM: mov r0, r2
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; THUMB: uxth r2, r1
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; THUMB: mov r0, r2
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%5 = call i32 @t4(i16 zeroext %b)
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;; A few test to check materialization
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;; Note: i1 1 was materialized with t1 call
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; ARM: movw r1, #255
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%6 = call i32 @t2(i8 zeroext 255)
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; ARM: movw r1, #65535
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; THUMB: movw r1, #65535
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%7 = call i32 @t4(i16 zeroext 65535)
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ret void
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}
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define void @foo2() nounwind {
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%1 = call signext i16 @t5()
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%2 = call zeroext i16 @t6()
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%3 = call signext i8 @t7()
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%4 = call zeroext i8 @t8()
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%5 = call zeroext i1 @t9()
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ret void
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}
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declare signext i16 @t5();
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declare zeroext i16 @t6();
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declare signext i8 @t7();
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declare zeroext i8 @t8();
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declare zeroext i1 @t9();
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define i32 @t10(i32 %argc, i8** nocapture %argv) {
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entry:
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; ARM: @t10
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; ARM: movw r0, #0
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; ARM: movw r1, #248
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; ARM: movw r2, #187
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; ARM: movw r3, #28
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; ARM: movw r9, #40
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; ARM: movw r12, #186
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; ARM: uxtb r0, r0
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; ARM: uxtb r1, r1
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; ARM: uxtb r2, r2
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; ARM: uxtb r3, r3
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; ARM: uxtb r9, r9
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; ARM: str r9, [sp]
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; ARM: uxtb r9, r12
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; ARM: str r9, [sp, #4]
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; ARM: bl _bar
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; THUMB: @t10
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; THUMB: movs r0, #0
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; THUMB: movt r0, #0
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; THUMB: movs r1, #248
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; THUMB: movt r1, #0
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; THUMB: movs r2, #187
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; THUMB: movt r2, #0
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; THUMB: movs r3, #28
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; THUMB: movt r3, #0
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; THUMB: movw r9, #40
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; THUMB: movt r9, #0
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; THUMB: movw r12, #186
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; THUMB: movt r12, #0
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; THUMB: uxtb r0, r0
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; THUMB: uxtb r1, r1
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; THUMB: uxtb r2, r2
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; THUMB: uxtb r3, r3
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; THUMB: uxtb.w r9, r9
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; THUMB: str.w r9, [sp]
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; THUMB: uxtb.w r9, r12
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; THUMB: str.w r9, [sp, #4]
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; THUMB: bl _bar
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%call = call i32 @bar(i8 zeroext 0, i8 zeroext -8, i8 zeroext -69, i8 zeroext 28, i8 zeroext 40, i8 zeroext -70)
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ret i32 0
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}
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declare i32 @bar(i8 zeroext, i8 zeroext, i8 zeroext, i8 zeroext, i8 zeroext, i8 zeroext)
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