mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-15 20:29:48 +00:00
b29b950bf2
SimplifyAddress to handle either a 12-bit unsigned offset or the ARM +/-imm8 offsets (addressing mode 3). This enables a load followed by an integer extend to be folded into a single load. For example: ldrb r1, [r0] ldrb r1, [r0] uxtb r2, r1 => mov r3, r2 mov r3, r1 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144488 91177308-0d34-0410-b5e6-96231b3b80d8
81 lines
1.5 KiB
LLVM
81 lines
1.5 KiB
LLVM
; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-apple-darwin | FileCheck %s --check-prefix=ARM
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; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-darwin | FileCheck %s --check-prefix=THUMB
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@a = global i8 1, align 1
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@b = global i16 2, align 2
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define void @t1() nounwind uwtable ssp {
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; ARM: t1
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; ARM: ldrb
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; ARM-NOT: uxtb
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; THUMB: t1
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; THUMB: ldrb
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; THUMB-NOT: uxtb
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%1 = load i8* @a, align 1
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call void @foo1(i8 zeroext %1)
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ret void
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}
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define void @t2() nounwind uwtable ssp {
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; ARM: t2
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; ARM: ldrh
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; ARM-NOT: uxth
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; THUMB: t2
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; THUMB: ldrh
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; THUMB-NOT: uxth
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%1 = load i16* @b, align 2
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call void @foo2(i16 zeroext %1)
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ret void
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}
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declare void @foo1(i8 zeroext)
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declare void @foo2(i16 zeroext)
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define i32 @t3() nounwind uwtable ssp {
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; ARM: t3
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; ARM: ldrb
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; ARM-NOT: uxtb
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; THUMB: t3
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; THUMB: ldrb
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; THUMB-NOT: uxtb
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%1 = load i8* @a, align 1
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%2 = zext i8 %1 to i32
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ret i32 %2
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}
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define i32 @t4() nounwind uwtable ssp {
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; ARM: t4
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; ARM: ldrh
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; ARM-NOT: uxth
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; THUMB: t4
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; THUMB: ldrh
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; THUMB-NOT: uxth
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%1 = load i16* @b, align 2
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%2 = zext i16 %1 to i32
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ret i32 %2
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}
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define i32 @t5() nounwind uwtable ssp {
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; ARM: t5
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; ARM: ldrsh
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; ARM-NOT: sxth
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; THUMB: t5
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; THUMB: ldrsh
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; THUMB-NOT: sxth
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%1 = load i16* @b, align 2
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%2 = sext i16 %1 to i32
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ret i32 %2
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}
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define i32 @t6() nounwind uwtable ssp {
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; ARM: t6
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; ARM: ldrsb
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; ARM-NOT: sxtb
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; THUMB: t6
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; THUMB: ldrsb
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; THUMB-NOT: sxtb
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%1 = load i8* @a, align 2
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%2 = sext i8 %1 to i32
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ret i32 %2
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}
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