mirror of
https://github.com/c64scene-ar/llvm-6502.git
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7c9c6ed761
Essentially the same as the GEP change in r230786.
A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)
import fileinput
import sys
import re
pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")
for line in sys.stdin:
sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7649
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
89 lines
2.5 KiB
LLVM
89 lines
2.5 KiB
LLVM
; RUN: opt < %s -O2 -force-vector-interleave=2 -force-vector-width=4 -debug-only=loop-vectorize -stats -S 2>&1 | FileCheck %s
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; REQUIRES: asserts
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; Loop from "rotated"
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; CHECK: LV: Loop hints: force=enabled
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; Loop from "nonrotated"
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; CHECK: LV: Loop hints: force=enabled
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; No more loops in the module
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; CHECK-NOT: LV: Loop hints: force=
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; In total only 1 loop should be rotated.
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; CHECK: 1 loop-rotate
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target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
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target triple = "x86_64-unknown-linux-gnu"
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; See http://reviews.llvm.org/D3348 for details.
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;
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; Test #1
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;
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; Ensure that "llvm.loop.vectorize.enable" metadata was not lost prior to LoopVectorize pass.
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; In past LoopRotate was clearing that metadata.
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;
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; The source C code is:
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; void rotated(float *a, int size)
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; {
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; int t = 0;
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; #pragma omp simd
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; for (int i = 0; i < size; ++i) {
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; a[i] = a[i-5] * a[i+2];
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; ++t;
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; }
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;}
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define void @rotated(float* nocapture %a, i64 %size) {
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entry:
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%cmp1 = icmp sgt i64 %size, 0
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br i1 %cmp1, label %for.header, label %for.end
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for.header:
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%indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ]
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%cmp2 = icmp sgt i64 %indvars.iv, %size
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br i1 %cmp2, label %for.end, label %for.body
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for.body:
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%0 = add nsw i64 %indvars.iv, -5
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%arrayidx = getelementptr inbounds float, float* %a, i64 %0
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%1 = load float, float* %arrayidx, align 4, !llvm.mem.parallel_loop_access !1
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%2 = add nsw i64 %indvars.iv, 2
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%arrayidx2 = getelementptr inbounds float, float* %a, i64 %2
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%3 = load float, float* %arrayidx2, align 4, !llvm.mem.parallel_loop_access !1
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%mul = fmul float %1, %3
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%arrayidx4 = getelementptr inbounds float, float* %a, i64 %indvars.iv
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store float %mul, float* %arrayidx4, align 4, !llvm.mem.parallel_loop_access !1
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%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
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br label %for.header, !llvm.loop !1
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for.end:
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ret void
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}
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!1 = !{!1, !2}
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!2 = !{!"llvm.loop.vectorize.enable", i1 true}
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;
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; Test #2
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;
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; Ensure that "llvm.loop.vectorize.enable" metadata was not lost even
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; if loop was not rotated (see http://reviews.llvm.org/D3348#comment-4).
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;
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define i32 @nonrotated(i32 %a) {
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entry:
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br label %loop_cond
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loop_cond:
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%indx = phi i32 [ 1, %entry ], [ %inc, %loop_inc ]
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%cmp = icmp ne i32 %indx, %a
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br i1 %cmp, label %return, label %loop_inc
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loop_inc:
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%inc = add i32 %indx, 1
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br label %loop_cond, !llvm.loop !3
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return:
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ret i32 0
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}
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!3 = !{!3, !4}
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!4 = !{!"llvm.loop.vectorize.enable", i1 true}
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