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https://github.com/c64scene-ar/llvm-6502.git
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5fd5b125ff
For example, on 32-bit architecture, don't promote all uses of the IV to 64-bits just because one use is a 64-bit cast. Alternate implementation of the patch by Arnaud de Grandmaison. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127884 91177308-0d34-0410-b5e6-96231b3b80d8
91 lines
2.9 KiB
LLVM
91 lines
2.9 KiB
LLVM
; RUN: opt < %s -indvars -S > %t
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; RUN: grep phi %t | count 4
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; RUN: grep {= phi i32} %t | count 4
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; RUN: not grep {sext i} %t
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; RUN: not grep {zext i} %t
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; RUN: not grep {trunc i} %t
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; RUN: not grep {add i8} %t
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; PR1301
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; Do a bunch of analysis and prove that the loops can use an i32 trip
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; count without casting.
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; ModuleID = 'ada.bc'
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target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-n:8:16:32"
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target triple = "i686-pc-linux-gnu"
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define void @kinds__sbytezero([256 x i32]* nocapture %a) nounwind {
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bb.thread:
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%tmp46 = getelementptr [256 x i32]* %a, i32 0, i32 0 ; <i32*> [#uses=1]
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store i32 0, i32* %tmp46
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br label %bb
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bb: ; preds = %bb, %bb.thread
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%i.0.reg2mem.0 = phi i8 [ -128, %bb.thread ], [ %tmp8, %bb ] ; <i8> [#uses=1]
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%tmp8 = add i8 %i.0.reg2mem.0, 1 ; <i8> [#uses=3]
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%tmp1 = sext i8 %tmp8 to i32 ; <i32> [#uses=1]
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%tmp3 = add i32 %tmp1, 128 ; <i32> [#uses=1]
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%tmp4 = getelementptr [256 x i32]* %a, i32 0, i32 %tmp3 ; <i32*> [#uses=1]
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store i32 0, i32* %tmp4
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%0 = icmp eq i8 %tmp8, 127 ; <i1> [#uses=1]
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br i1 %0, label %return, label %bb
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return: ; preds = %bb
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ret void
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}
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define void @kinds__ubytezero([256 x i32]* nocapture %a) nounwind {
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bb.thread:
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%tmp35 = getelementptr [256 x i32]* %a, i32 0, i32 0 ; <i32*> [#uses=1]
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store i32 0, i32* %tmp35
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br label %bb
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bb: ; preds = %bb, %bb.thread
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%i.0.reg2mem.0 = phi i8 [ 0, %bb.thread ], [ %tmp7, %bb ] ; <i8> [#uses=1]
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%tmp7 = add i8 %i.0.reg2mem.0, 1 ; <i8> [#uses=3]
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%tmp1 = zext i8 %tmp7 to i32 ; <i32> [#uses=1]
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%tmp3 = getelementptr [256 x i32]* %a, i32 0, i32 %tmp1 ; <i32*> [#uses=1]
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store i32 0, i32* %tmp3
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%0 = icmp eq i8 %tmp7, -1 ; <i1> [#uses=1]
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br i1 %0, label %return, label %bb
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return: ; preds = %bb
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ret void
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}
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define void @kinds__srangezero([21 x i32]* nocapture %a) nounwind {
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bb.thread:
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br label %bb
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bb: ; preds = %bb, %bb.thread
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%i.0.reg2mem.0 = phi i8 [ -10, %bb.thread ], [ %tmp7, %bb ] ; <i8> [#uses=2]
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%tmp12 = sext i8 %i.0.reg2mem.0 to i32 ; <i32> [#uses=1]
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%tmp4 = add i32 %tmp12, 10 ; <i32> [#uses=1]
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%tmp5 = getelementptr [21 x i32]* %a, i32 0, i32 %tmp4 ; <i32*> [#uses=1]
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store i32 0, i32* %tmp5
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%tmp7 = add i8 %i.0.reg2mem.0, 1 ; <i8> [#uses=2]
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%0 = icmp sgt i8 %tmp7, 10 ; <i1> [#uses=1]
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br i1 %0, label %return, label %bb
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return: ; preds = %bb
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ret void
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}
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define void @kinds__urangezero([21 x i32]* nocapture %a) nounwind {
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bb.thread:
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br label %bb
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bb: ; preds = %bb, %bb.thread
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%i.0.reg2mem.0 = phi i8 [ 10, %bb.thread ], [ %tmp7, %bb ] ; <i8> [#uses=2]
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%tmp12 = sext i8 %i.0.reg2mem.0 to i32 ; <i32> [#uses=1]
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%tmp4 = add i32 %tmp12, -10 ; <i32> [#uses=1]
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%tmp5 = getelementptr [21 x i32]* %a, i32 0, i32 %tmp4 ; <i32*> [#uses=1]
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store i32 0, i32* %tmp5
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%tmp7 = add i8 %i.0.reg2mem.0, 1 ; <i8> [#uses=2]
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%0 = icmp sgt i8 %tmp7, 30 ; <i1> [#uses=1]
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br i1 %0, label %return, label %bb
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return: ; preds = %bb
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ret void
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}
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