llvm-6502/test/CodeGen
Craig Topper 205e3378fd More AVX2 instructions and intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143536 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-02 06:54:17 +00:00
..
ARM Always use the string pool, even when it makes the .o larger. This may help 2011-10-28 05:29:47 +00:00
CBackend
CellSPU Revert r143206, as there are still some failing tests. 2011-10-29 00:41:52 +00:00
CPP
Generic
MBlaze Change the default scheduler from Latency to ILP, since Latency 2011-10-24 17:45:02 +00:00
Mips Revert r143206, as there are still some failing tests. 2011-10-29 00:41:52 +00:00
MSP430 Remove the explicit request for "Latency" scheduling from MSP430, 2011-10-24 17:53:16 +00:00
PowerPC test/CodeGen/PowerPC/2008-10-17-AsmMatchingOperands.ll: [PR11218] Mark "REQUIRES: asserts" for now. 2011-10-28 23:11:03 +00:00
PTX Change the default scheduler from Latency to ILP, since Latency 2011-10-24 17:45:02 +00:00
SPARC
Thumb Revert r143206, as there are still some failing tests. 2011-10-29 00:41:52 +00:00
Thumb2
X86 More AVX2 instructions and intrinsics. 2011-11-02 06:54:17 +00:00
XCore Don't fold negative offsets into cp / dp accesses to avoid relocation errors. 2011-11-01 11:31:53 +00:00