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https://github.com/c64scene-ar/llvm-6502.git
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and stores was added. - SelectAddr should return false if Parent is an unaligned f32 load or store. - Only aligned load and store nodes should be matched to select reg+imm floating point instructions. - MIPS does not have support for f64 unaligned load or store instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151843 91177308-0d34-0410-b5e6-96231b3b80d8
111 lines
2.9 KiB
LLVM
111 lines
2.9 KiB
LLVM
; RUN: llc -march=mips64el -mcpu=mips64r2 -mattr=n64 < %s | FileCheck %s
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%struct.S = type <{ [4 x float] }>
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%struct.S2 = type <{ [4 x double] }>
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%struct.S3 = type <{ i8, float }>
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@s = external global [4 x %struct.S]
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@gf = external global float
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@gd = external global double
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@s2 = external global [4 x %struct.S2]
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@s3 = external global %struct.S3
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define float @foo0(float* nocapture %b, i32 %o) nounwind readonly {
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entry:
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; CHECK: lwxc1
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%idxprom = zext i32 %o to i64
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%arrayidx = getelementptr inbounds float* %b, i64 %idxprom
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%0 = load float* %arrayidx, align 4
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ret float %0
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}
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define double @foo1(double* nocapture %b, i32 %o) nounwind readonly {
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entry:
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; CHECK: ldxc1
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%idxprom = zext i32 %o to i64
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%arrayidx = getelementptr inbounds double* %b, i64 %idxprom
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%0 = load double* %arrayidx, align 8
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ret double %0
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}
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define float @foo2(i32 %b, i32 %c) nounwind readonly {
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entry:
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; CHECK: luxc1
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%idxprom = zext i32 %c to i64
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%idxprom1 = zext i32 %b to i64
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%arrayidx2 = getelementptr inbounds [4 x %struct.S]* @s, i64 0, i64 %idxprom1, i32 0, i64 %idxprom
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%0 = load float* %arrayidx2, align 1
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ret float %0
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}
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define void @foo3(float* nocapture %b, i32 %o) nounwind {
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entry:
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; CHECK: swxc1
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%0 = load float* @gf, align 4
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%idxprom = zext i32 %o to i64
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%arrayidx = getelementptr inbounds float* %b, i64 %idxprom
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store float %0, float* %arrayidx, align 4
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ret void
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}
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define void @foo4(double* nocapture %b, i32 %o) nounwind {
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entry:
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; CHECK: sdxc1
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%0 = load double* @gd, align 8
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%idxprom = zext i32 %o to i64
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%arrayidx = getelementptr inbounds double* %b, i64 %idxprom
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store double %0, double* %arrayidx, align 8
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ret void
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}
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define void @foo5(i32 %b, i32 %c) nounwind {
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entry:
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; CHECK: suxc1
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%0 = load float* @gf, align 4
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%idxprom = zext i32 %c to i64
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%idxprom1 = zext i32 %b to i64
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%arrayidx2 = getelementptr inbounds [4 x %struct.S]* @s, i64 0, i64 %idxprom1, i32 0, i64 %idxprom
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store float %0, float* %arrayidx2, align 1
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ret void
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}
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define double @foo6(i32 %b, i32 %c) nounwind readonly {
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entry:
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; CHECK: foo6
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; CHECK-NOT: ldxc1
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%idxprom = zext i32 %c to i64
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%idxprom1 = zext i32 %b to i64
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%arrayidx2 = getelementptr inbounds [4 x %struct.S2]* @s2, i64 0, i64 %idxprom1, i32 0, i64 %idxprom
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%0 = load double* %arrayidx2, align 1
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ret double %0
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}
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define void @foo7(i32 %b, i32 %c) nounwind {
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entry:
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; CHECK: foo7
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; CHECK-NOT: sdxc1
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%0 = load double* @gd, align 8
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%idxprom = zext i32 %c to i64
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%idxprom1 = zext i32 %b to i64
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%arrayidx2 = getelementptr inbounds [4 x %struct.S2]* @s2, i64 0, i64 %idxprom1, i32 0, i64 %idxprom
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store double %0, double* %arrayidx2, align 1
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ret void
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}
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define float @foo8() nounwind readonly {
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entry:
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; CHECK: foo8
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; CHECK: luxc1
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%0 = load float* getelementptr inbounds (%struct.S3* @s3, i64 0, i32 1), align 1
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ret float %0
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}
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define void @foo9(float %f) nounwind {
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entry:
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; CHECK: foo9
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; CHECK: suxc1
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store float %f, float* getelementptr inbounds (%struct.S3* @s3, i64 0, i32 1), align 1
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ret void
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}
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