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llvm-6502/lib/Target/AArch64
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Stephen Lin e54885af9b AArch64/PowerPC/SystemZ/X86: This patch fixes the interface, usage, and all 
in-tree implementations of TargetLoweringBase::isFMAFasterThanMulAndAdd in
order to resolve the following issues with fmuladd (i.e. optional FMA)
intrinsics:

1. On X86(-64) targets, ISD::FMA nodes are formed when lowering fmuladd
intrinsics even if the subtarget does not support FMA instructions, leading
to laughably bad code generation in some situations.

2. On AArch64 targets, ISD::FMA nodes are formed for operations on fp128,
resulting in a call to a software fp128 FMA implementation.

3. On PowerPC targets, FMAs are not generated from fmuladd intrinsics on types
like v2f32, v8f32, v4f64, etc., even though they promote, split, scalarize,
etc. to types that support hardware FMAs.

The function has also been slightly renamed for consistency and to force a
merge/build conflict for any out-of-tree target implementing it. To resolve,
see comments and fixed in-tree examples.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185956 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-09 18:16:56 +00:00
..
AsmParser Remove address spaces from MC. 2013-07-02 15:49:13 +00:00
Disassembler Use a OwningPtr instead of a manual delete. 2013-07-04 22:15:33 +00:00
InstPrinter
MCTargetDesc Remove address spaces from MC. 2013-07-02 15:49:13 +00:00
TargetInfo AArch64: clarify -help message 2013-05-28 21:09:39 +00:00
Utils Replace Count{Leading,Trailing}Zeros_{32,64} with count{Leading,Trailing}Zeros. 2013-05-24 22:23:49 +00:00
AArch64.h
AArch64.td
AArch64AsmPrinter.cpp Remove address spaces from MC. 2013-07-02 15:49:13 +00:00
AArch64AsmPrinter.h DebugInfo: remove target-specific Frame Index handling for DBG_VALUE MachineInstrs 2013-06-16 20:34:27 +00:00
AArch64BranchFixupPass.cpp Replace Count{Leading,Trailing}Zeros_{32,64} with count{Leading,Trailing}Zeros. 2013-05-24 22:23:49 +00:00
AArch64CallingConv.td
AArch64FrameLowering.cpp Use pointers to the MCAsmInfo and MCRegInfo. 2013-06-18 07:20:20 +00:00
AArch64FrameLowering.h Move the eliminateCallFramePseudoInstr method from TargetRegisterInfo 2013-02-21 20:05:00 +00:00
AArch64InstrFormats.td AArch64 InstrFormats: 2013-04-28 01:45:11 +00:00
AArch64InstrInfo.cpp DebugInfo: remove target-specific Frame Index handling for DBG_VALUE MachineInstrs 2013-06-16 20:34:27 +00:00
AArch64InstrInfo.h DebugInfo: remove target-specific Frame Index handling for DBG_VALUE MachineInstrs 2013-06-16 20:34:27 +00:00
AArch64InstrInfo.td AArch64: correct CodeGen of MOVZ/MOVK combinations. 2013-07-01 19:23:10 +00:00
AArch64ISelDAGToDAG.cpp AArch64: correct CodeGen of MOVZ/MOVK combinations. 2013-07-01 19:23:10 +00:00
AArch64ISelLowering.cpp AArch64/PowerPC/SystemZ/X86: This patch fixes the interface, usage, and all 2013-07-09 18:16:56 +00:00
AArch64ISelLowering.h AArch64/PowerPC/SystemZ/X86: This patch fixes the interface, usage, and all 2013-07-09 18:16:56 +00:00
AArch64MachineFunctionInfo.cpp
AArch64MachineFunctionInfo.h
AArch64MCInstLower.cpp AArch64: implement large code model access to global variables. 2013-05-04 16:53:46 +00:00
AArch64RegisterInfo.cpp Don't cache the instruction info and register info objects. 2013-06-07 05:00:11 +00:00
AArch64RegisterInfo.h Don't cache the instruction info and register info objects. 2013-06-07 05:00:11 +00:00
AArch64RegisterInfo.td Make SubRegIndex size mandatory, following r183020. 2013-05-31 23:45:26 +00:00
AArch64Schedule.td
AArch64SelectionDAGInfo.cpp
AArch64SelectionDAGInfo.h
AArch64Subtarget.cpp
AArch64Subtarget.h
AArch64TargetMachine.cpp Remove the MachineMove class. 2013-05-13 01:16:13 +00:00
AArch64TargetMachine.h
AArch64TargetObjectFile.cpp
AArch64TargetObjectFile.h
CMakeLists.txt
LLVMBuild.txt Build system changes to enable MCJIT on AArch64 2013-05-04 20:13:52 +00:00
Makefile
README.txt

README.txt 

This file will contain changes that need to be made before AArch64 can become an
officially supported target. Currently a placeholder.