| .. |
|
.cvsignore
|
ignore generated files
|
2005-09-07 23:47:44 +00:00 |
|
Alpha.h
|
Alpha JIT (beta)
|
2005-07-22 20:52:16 +00:00 |
|
Alpha.td
|
remove a pseudo instruction, make ret always right, and fix vararg chains
|
2005-06-23 23:42:05 +00:00 |
|
AlphaAsmPrinter.cpp
|
begining alpha subtarget support
|
2005-09-29 22:54:56 +00:00 |
|
AlphaCodeEmitter.cpp
|
No, IDEFs shouldn't be JITed
|
2005-08-04 15:32:36 +00:00 |
|
AlphaInstrFormats.td
|
support bsr, and more .td simplification
|
2005-07-28 18:14:47 +00:00 |
|
AlphaInstrInfo.cpp
|
|
|
|
AlphaInstrInfo.h
|
|
|
|
AlphaInstrInfo.td
|
mark variable arity instructions as such. Alpha wins the battle for
|
2005-08-19 00:51:37 +00:00 |
|
AlphaISelLowering.cpp
|
begining alpha subtarget support
|
2005-09-29 22:54:56 +00:00 |
|
AlphaISelLowering.h
|
Pull out Lowering in preperation for multiple ISels. Oh, and get rid of some stuff
|
2005-09-02 18:46:02 +00:00 |
|
AlphaISelPattern.cpp
|
begining alpha subtarget support
|
2005-09-29 22:54:56 +00:00 |
|
AlphaJITInfo.cpp
|
No, IDEFs shouldn't be JITed
|
2005-08-04 15:32:36 +00:00 |
|
AlphaJITInfo.h
|
Alpha JIT (beta)
|
2005-07-22 20:52:16 +00:00 |
|
AlphaRegisterInfo.cpp
|
Pass extra regclasses into spilling code
|
2005-09-30 01:29:42 +00:00 |
|
AlphaRegisterInfo.h
|
Pass extra regclasses into spilling code
|
2005-09-30 01:29:42 +00:00 |
|
AlphaRegisterInfo.td
|
Put register classes in namespaces
|
2005-08-19 18:50:46 +00:00 |
|
AlphaRelocations.h
|
support bsr, and more .td simplification
|
2005-07-28 18:14:47 +00:00 |
|
AlphaSubtarget.cpp
|
Sort the cpu and features table, so that the alpha backend doesn't fail EVERY
|
2005-10-02 07:13:52 +00:00 |
|
AlphaSubtarget.h
|
begining alpha subtarget support
|
2005-09-29 22:54:56 +00:00 |
|
AlphaTargetMachine.cpp
|
begining alpha subtarget support
|
2005-09-29 22:54:56 +00:00 |
|
AlphaTargetMachine.h
|
begining alpha subtarget support
|
2005-09-29 22:54:56 +00:00 |
|
Makefile
|
|
|
080a4b1637