mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-28 19:31:58 +00:00
d329c79f16
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206749 91177308-0d34-0410-b5e6-96231b3b80d8
153 lines
4.2 KiB
LLVM
153 lines
4.2 KiB
LLVM
; RUN: llc < %s -march=arm64 | FileCheck %s
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target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
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%divovf8 = type { i8, i1 }
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%divovf16 = type { i16, i1 }
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%divovf32 = type { i32, i1 }
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%divovf64 = type { i64, i1 }
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declare %divovf8 @llvm.safe.sdiv.i8(i8, i8) nounwind readnone
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declare %divovf16 @llvm.safe.sdiv.i16(i16, i16) nounwind readnone
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declare %divovf32 @llvm.safe.sdiv.i32(i32, i32) nounwind readnone
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declare %divovf64 @llvm.safe.sdiv.i64(i64, i64) nounwind readnone
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declare %divovf8 @llvm.safe.srem.i8(i8, i8) nounwind readnone
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declare %divovf16 @llvm.safe.srem.i16(i16, i16) nounwind readnone
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declare %divovf32 @llvm.safe.srem.i32(i32, i32) nounwind readnone
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declare %divovf64 @llvm.safe.srem.i64(i64, i64) nounwind readnone
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declare %divovf8 @llvm.safe.udiv.i8(i8, i8) nounwind readnone
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declare %divovf16 @llvm.safe.udiv.i16(i16, i16) nounwind readnone
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declare %divovf32 @llvm.safe.udiv.i32(i32, i32) nounwind readnone
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declare %divovf64 @llvm.safe.udiv.i64(i64, i64) nounwind readnone
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declare %divovf8 @llvm.safe.urem.i8(i8, i8) nounwind readnone
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declare %divovf16 @llvm.safe.urem.i16(i16, i16) nounwind readnone
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declare %divovf32 @llvm.safe.urem.i32(i32, i32) nounwind readnone
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declare %divovf64 @llvm.safe.urem.i64(i64, i64) nounwind readnone
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; CHECK-LABEL: sdiv8
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; CHECK: sdiv{{[ ]}}
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define %divovf8 @sdiv8(i8 %x, i8 %y) {
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entry:
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%divr = call %divovf8 @llvm.safe.sdiv.i8(i8 %x, i8 %y)
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ret %divovf8 %divr
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}
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; CHECK-LABEL: sdiv16
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; CHECK: sdiv{{[ ]}}
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define %divovf16 @sdiv16(i16 %x, i16 %y) {
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entry:
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%divr = call %divovf16 @llvm.safe.sdiv.i16(i16 %x, i16 %y)
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ret %divovf16 %divr
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}
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; CHECK-LABEL: sdiv32
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; CHECK: sdiv{{[ ]}}
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define %divovf32 @sdiv32(i32 %x, i32 %y) {
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entry:
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%divr = call %divovf32 @llvm.safe.sdiv.i32(i32 %x, i32 %y)
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ret %divovf32 %divr
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}
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; CHECK-LABEL: sdiv64
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; CHECK: sdiv{{[ ]}}
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define %divovf64 @sdiv64(i64 %x, i64 %y) {
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entry:
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%divr = call %divovf64 @llvm.safe.sdiv.i64(i64 %x, i64 %y)
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ret %divovf64 %divr
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}
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; CHECK-LABEL: udiv8
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; CHECK: udiv{{[ ]}}
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define %divovf8 @udiv8(i8 %x, i8 %y) {
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entry:
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%divr = call %divovf8 @llvm.safe.udiv.i8(i8 %x, i8 %y)
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ret %divovf8 %divr
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}
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; CHECK-LABEL: udiv16
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; CHECK: udiv{{[ ]}}
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define %divovf16 @udiv16(i16 %x, i16 %y) {
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entry:
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%divr = call %divovf16 @llvm.safe.udiv.i16(i16 %x, i16 %y)
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ret %divovf16 %divr
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}
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; CHECK-LABEL: udiv32
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; CHECK: udiv{{[ ]}}
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define %divovf32 @udiv32(i32 %x, i32 %y) {
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entry:
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%divr = call %divovf32 @llvm.safe.udiv.i32(i32 %x, i32 %y)
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ret %divovf32 %divr
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}
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; CHECK-LABEL: udiv64
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; CHECK: udiv{{[ ]}}
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define %divovf64 @udiv64(i64 %x, i64 %y) {
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entry:
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%divr = call %divovf64 @llvm.safe.udiv.i64(i64 %x, i64 %y)
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ret %divovf64 %divr
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}
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; CHECK-LABEL: srem8
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; CHECK: sdiv{{[ ]}}
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; CHECK: msub{{[ ]}}
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define %divovf8 @srem8(i8 %x, i8 %y) {
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entry:
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%remr = call %divovf8 @llvm.safe.srem.i8(i8 %x, i8 %y)
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ret %divovf8 %remr
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}
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; CHECK-LABEL: srem16
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; CHECK: sdiv{{[ ]}}
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; CHECK: msub{{[ ]}}
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define %divovf16 @srem16(i16 %x, i16 %y) {
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entry:
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%remr = call %divovf16 @llvm.safe.srem.i16(i16 %x, i16 %y)
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ret %divovf16 %remr
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}
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; CHECK-LABEL: srem32
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; CHECK: sdiv{{[ ]}}
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; CHECK: msub{{[ ]}}
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define %divovf32 @srem32(i32 %x, i32 %y) {
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entry:
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%remr = call %divovf32 @llvm.safe.srem.i32(i32 %x, i32 %y)
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ret %divovf32 %remr
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}
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; CHECK-LABEL: srem64
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; CHECK: sdiv{{[ ]}}
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; CHECK: msub{{[ ]}}
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define %divovf64 @srem64(i64 %x, i64 %y) {
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entry:
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%remr = call %divovf64 @llvm.safe.srem.i64(i64 %x, i64 %y)
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ret %divovf64 %remr
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}
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; CHECK-LABEL: urem8
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; CHECK: udiv{{[ ]}}
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; CHECK: msub{{[ ]}}
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define %divovf8 @urem8(i8 %x, i8 %y) {
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entry:
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%remr = call %divovf8 @llvm.safe.urem.i8(i8 %x, i8 %y)
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ret %divovf8 %remr
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}
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; CHECK-LABEL: urem16
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; CHECK: udiv{{[ ]}}
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; CHECK: msub{{[ ]}}
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define %divovf16 @urem16(i16 %x, i16 %y) {
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entry:
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%remr = call %divovf16 @llvm.safe.urem.i16(i16 %x, i16 %y)
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ret %divovf16 %remr
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}
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; CHECK-LABEL: urem32
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; CHECK: udiv{{[ ]}}
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; CHECK: msub{{[ ]}}
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define %divovf32 @urem32(i32 %x, i32 %y) {
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entry:
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%remr = call %divovf32 @llvm.safe.urem.i32(i32 %x, i32 %y)
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ret %divovf32 %remr
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}
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; CHECK-LABEL: urem64
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; CHECK: udiv{{[ ]}}
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; CHECK: msub{{[ ]}}
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define %divovf64 @urem64(i64 %x, i64 %y) {
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entry:
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%remr = call %divovf64 @llvm.safe.urem.i64(i64 %x, i64 %y)
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ret %divovf64 %remr
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}
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!llvm.ident = !{!0}
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!0 = metadata !{metadata !"clang version 3.5.0 "}
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