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llvm-6502/test/MC
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Bruno Cardoso Lopes 6596a62076 - Add AVX SSE2 Move doubleword and quadword instructions. 
- Add encode bits for VEX_W
- All 128-bit SSE 1 & SSE2 instructions that are described
  in the .td file now have a AVX encoded form already working.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107365 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-01 01:20:06 +00:00
..
AsmParser - Add AVX SSE2 Move doubleword and quadword instructions. 2010-07-01 01:20:06 +00:00
Disassembler Eliminated the classification of control registers into %ecr_ 2010-05-06 20:59:00 +00:00
MachO MC/X86: Add aliases for Jcc variants. 2010-05-27 21:33:19 +00:00