Tim Northover 5c8b83eb7a X86: expand atomics in IR instead of as MachineInstrs. ... The logic for expanding atomics that aren't natively supported in terms of cmpxchg loops is much simpler to express at the IR level. It also allows the normal optimisations and CodeGen improvements to help out with atomics, instead of using a limited set of possible instructions.. rdar://problem/13496295 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212119 91177308-0d34-0410-b5e6-96231b3b80d8		2014-07-01 18:53:31 +00:00
..
AArch64	Revert "MachineScheduler: better book-keeping for asserts."	2014-07-01 17:23:11 +00:00
ARM	Debug info: split out complex DIVariable address expressions into a	2014-06-30 17:17:35 +00:00
CPP
Generic
Hexagon
Inputs
Mips	Print a=b as an assignment.	2014-06-24 22:45:16 +00:00
MSP430
NVPTX	[NVPTX] Add reflect intrinsic (better than matching by function name)	2014-06-27 18:36:11 +00:00
PowerPC	[PowerPC] Constrain base register in PPCRegisterInfo::resolveFrameIndex	2014-06-27 13:04:12 +00:00
R600	Revert "Temporary hack to try cleaning extra .s file from bots."	2014-06-27 23:11:26 +00:00
SPARC
SystemZ
Thumb
Thumb2	ARM: Fix TPsoft for Thumb mode	2014-06-24 15:45:59 +00:00
X86	X86: expand atomics in IR instead of as MachineInstrs.	2014-07-01 18:53:31 +00:00
XCore