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https://github.com/c64scene-ar/llvm-6502.git
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58fc1f52ce
The PowerPC-specific modifiers VK_PPC_TLSGD and VK_PPC_TLSLD correspond exactly to the generic modifiers VK_TLSGD and VK_TLSLD. This causes some confusion with the asm parser, since VK_PPC_TLSGD is output as @tlsgd, which is then read back in as VK_TLSGD. To avoid this confusion, this patch removes the PowerPC-specific modifiers and uses the generic modifiers throughout. (The only drawback is that the generic modifiers are printed in upper case while the usual convention on PowerPC is to use lower-case modifiers. But this is just a cosmetic issue.) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185476 91177308-0d34-0410-b5e6-96231b3b80d8
25 lines
795 B
LLVM
25 lines
795 B
LLVM
; RUN: llc -mcpu=pwr7 -O1 -relocation-model=pic < %s | FileCheck %s
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; Test peephole optimization for thread-local storage using the
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; local dynamic model.
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target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64"
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target triple = "powerpc64-unknown-linux-gnu"
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@a = hidden thread_local global i32 0, align 4
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define signext i32 @main() nounwind {
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entry:
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%retval = alloca i32, align 4
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store i32 0, i32* %retval
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%0 = load i32* @a, align 4
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ret i32 %0
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}
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; CHECK: addis [[REG:[0-9]+]], 2, a@got@tlsld@ha
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; CHECK-NEXT: addi 3, [[REG]], a@got@tlsld@l
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; CHECK: bl __tls_get_addr(a@TLSLD)
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; CHECK-NEXT: nop
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; CHECK: addis [[REG2:[0-9]+]], 3, a@dtprel@ha
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; CHECK-NEXT: lwa {{[0-9]+}}, a@dtprel@l([[REG2]])
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