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6816d66d99
This abstraction allows us to support the various records that can be placed in the .MIPS.options section in the future. We currently use it to record register usage information (the ODK_REGINFO record in our ELF64 spec). Each .MIPS.options record should subclass MipsOptionRecord and provide an implementation of EmitMipsOptionRecord. Patch by Matheus Almeida and Toma Tabacu git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213522 91177308-0d34-0410-b5e6-96231b3b80d8
44 lines
1.4 KiB
C++
44 lines
1.4 KiB
C++
//===-------- MipsELFStreamer.cpp - ELF Object Output ---------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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#include "MipsELFStreamer.h"
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#include "llvm/MC/MCInst.h"
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void MipsELFStreamer::EmitInstruction(const MCInst &Inst,
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const MCSubtargetInfo &STI) {
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MCELFStreamer::EmitInstruction(Inst, STI);
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MCContext &Context = getContext();
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const MCRegisterInfo *MCRegInfo = Context.getRegisterInfo();
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for (unsigned OpIndex = 0; OpIndex < Inst.getNumOperands(); ++OpIndex) {
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const MCOperand &Op = Inst.getOperand(OpIndex);
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if (!Op.isReg())
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continue;
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unsigned Reg = Op.getReg();
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RegInfoRecord->SetPhysRegUsed(Reg, MCRegInfo);
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}
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}
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void MipsELFStreamer::EmitMipsOptionRecords() {
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for (const auto &I : MipsOptionRecords)
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I->EmitMipsOptionRecord();
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}
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namespace llvm {
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MCELFStreamer *createMipsELFStreamer(MCContext &Context, MCAsmBackend &MAB,
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raw_ostream &OS, MCCodeEmitter *Emitter,
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const MCSubtargetInfo &STI, bool RelaxAll,
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bool NoExecStack) {
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return new MipsELFStreamer(Context, MAB, OS, Emitter, STI);
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}
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}
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