llvm-6502/test/CodeGen
Arnold Schwaighofer 5d2c01e48a CheckTailCallReturnConstraints is missing a check on the
incomming chain of the RETURN node. The incomming chain must
be the outgoing chain of the CALL node. This causes the
backend to identify tail calls that are not tail calls. This
patch fixes this.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73387 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-15 14:43:36 +00:00
..
Alpha
ARM Part 1. 2009-06-15 08:28:29 +00:00
CBackend Fix an erroneous check for isFNeg; the FNeg case is handled 2009-06-04 23:43:29 +00:00
CellSPU Split the Add, Sub, and Mul instruction opcodes into separate 2009-06-04 22:49:04 +00:00
CPP Fix code emission for conditional branches. 2009-05-04 19:10:38 +00:00
Generic Split the Add, Sub, and Mul instruction opcodes into separate 2009-06-04 22:49:04 +00:00
IA64
Mips Split the Add, Sub, and Mul instruction opcodes into separate 2009-06-04 22:49:04 +00:00
MSP430 Split the Add, Sub, and Mul instruction opcodes into separate 2009-06-04 22:49:04 +00:00
PowerPC PR3628: Add patterns to match SHL/SRL/SRA to the corresponding Altivec 2009-06-07 01:07:55 +00:00
SPARC Split the Add, Sub, and Mul instruction opcodes into separate 2009-06-04 22:49:04 +00:00
X86 CheckTailCallReturnConstraints is missing a check on the 2009-06-15 14:43:36 +00:00
XCore Split the Add, Sub, and Mul instruction opcodes into separate 2009-06-04 22:49:04 +00:00