llvm-6502/test/CodeGen
Bill Wendling 9440e35b98 Revert the "XFAIL" for the rotate_ops.ll testcase. Instead, mark ISD::ROTR
instructions in CellSPU as "Expand" so that they won't be generated. I added a
"FIXME" so that this hack can be addressed and reverted once ISD::ROTR is
supported in the .td files.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55582 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-31 02:59:23 +00:00
..
Alpha allow this to pass. 2008-08-29 17:18:26 +00:00
ARM It's not legal to output a GV in a coalesced section if it's used in an ARM PIC relative constantpool. 2008-08-08 06:56:16 +00:00
CBackend In the CBackend, use casts to force integer add, subtract, and 2008-07-18 18:43:12 +00:00
CellSPU Revert the "XFAIL" for the rotate_ops.ll testcase. Instead, mark ISD::ROTR 2008-08-31 02:59:23 +00:00
CPP Put CPPBackend tests into their own directory and run them only if they're 2008-07-10 22:35:32 +00:00
Generic Improve support for vector casts in LLVM IR and CodeGen. 2008-08-14 20:04:46 +00:00
IA64 sabre brings to my attention that the 'tr' suffix is also obsolete 2008-05-20 21:00:03 +00:00
Mips Support added for ctlz intrinsic, test case added. 2008-08-08 06:16:31 +00:00
PowerPC Testcases for ppc atomics. 2008-08-30 00:54:31 +00:00
SPARC sabre brings to my attention that the 'tr' suffix is also obsolete 2008-05-20 21:00:03 +00:00
X86 Re-apply 55467 with fix. If copy is being replaced by remat'ed def, transfer the implicit defs onto the remat'ed instruction. 2008-08-30 09:09:33 +00:00