llvm-6502/test/CodeGen/Mips/micromips-load-effective-address.ll
David Blaikie 7c9c6ed761 [opaque pointer type] Add textual IR support for explicit type parameter to load instruction
Essentially the same as the GEP change in r230786.

A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)

import fileinput
import sys
import re

pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")

for line in sys.stdin:
  sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))

Reviewers: rafael, dexonsmith, grosser

Differential Revision: http://reviews.llvm.org/D7649

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-27 21:17:42 +00:00

30 lines
825 B
LLVM

; RUN: llc %s -march=mipsel -mattr=micromips -filetype=asm \
; RUN: -relocation-model=pic -O3 -o - | FileCheck %s
define i32 @sum(i32* %x, i32* %y) nounwind uwtable {
entry:
%x.addr = alloca i32*, align 8
%y.addr = alloca i32*, align 8
store i32* %x, i32** %x.addr, align 8
store i32* %y, i32** %y.addr, align 8
%0 = load i32*, i32** %x.addr, align 8
%1 = load i32, i32* %0, align 4
%2 = load i32*, i32** %y.addr, align 8
%3 = load i32, i32* %2, align 4
%add = add nsw i32 %1, %3
ret i32 %add
}
define i32 @main() nounwind uwtable {
entry:
%retval = alloca i32, align 4
%x = alloca i32, align 4
%y = alloca i32, align 4
store i32 0, i32* %retval
%call = call i32 @sum(i32* %x, i32* %y)
ret i32 %call
}
; CHECK: addiu ${{[0-9]+}}, $sp, {{[0-9]+}}
; CHECK: addiu ${{[0-9]+}}, $sp, {{[0-9]+}}