mirror of
https://github.com/c64scene-ar/llvm-6502.git
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LLVM backend for 6502
5d7ab8503b
rdar://problem/8893967: JM/lencod miscompile at -arch armv7 -mthumb -O3 Added ResurrectKill to remove kill flags after we decide to reused a physical register. And (hopefully) ensure that we call it in all the right places. Sorry, I'm not checking in a unit test given that it's a miscompile I can't reproduce easily with a toy example. Failures in the rewriter depend on a series of heuristic decisions maked during one of the many upstream phases in codegen. This case would require coercing regalloc to generate a couple of rematerialzations in a way that causes the scavenger to reuse the same register at just the wrong point. The general way to test this is to implement kill flags verification. Then we could have a simple, robust compile-only unit test. That would be worth doing if the whole pass was not about to disappear. At this point we focus verification work on the next generation of regalloc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124442 91177308-0d34-0410-b5e6-96231b3b80d8 |
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