llvm-6502/test/CodeGen/NVPTX/imad.ll
Justin Holewinski 10da1651ed [NVPTX] Implement fma and imad contraction as target DAGCombiner patterns
This also introduces DAGCombiner patterns for mul.wide to multiply two smaller integers and produce a larger integer

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211935 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-27 18:35:37 +00:00

10 lines
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LLVM

; RUN: llc < %s -march=nvptx -mcpu=sm_20 | FileCheck %s
; CHECK: imad
define i32 @imad(i32 %a, i32 %b, i32 %c) {
; CHECK: mad.lo.s32
%val0 = mul i32 %a, %b
%val1 = add i32 %val0, %c
ret i32 %val1
}