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ff340f98e3
This is a follow up to r227113. It is now required to use the amdgcn target for SI and newer GPUs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227316 91177308-0d34-0410-b5e6-96231b3b80d8
15 lines
442 B
LLVM
15 lines
442 B
LLVM
; RUN: llc < %s -mtriple=amdgcn--amdhsa -mcpu=kaveri | FileCheck --check-prefix=HSA %s
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; HSA: {{^}}simple:
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; HSA: .section .hsa.version
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; HSA-NEXT: .ascii "HSA Code Unit:0.0:AMD:0.1:GFX8.1:0"
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; Make sure we are setting the ATC bit:
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; HSA: s_mov_b32 s[[HI:[0-9]]], 0x100f000
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; HSA: buffer_store_dword v{{[0-9]+}}, s[0:[[HI]]], 0
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define void @simple(i32 addrspace(1)* %out) {
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entry:
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store i32 0, i32 addrspace(1)* %out
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ret void
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}
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