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04bcc11905
derived classes. Since global data alignment, layout, and mangling is often based on the DataLayout, move it to the TargetMachine. This ensures that global data is going to be layed out and mangled consistently if the subtarget changes on a per function basis. Prior to this all targets(*) have had subtarget dependent code moved out and onto the TargetMachine. *One target hasn't been migrated as part of this change: R600. The R600 port has, as a subtarget feature, the size of pointers and this affects global data layout. I've currently hacked in a FIXME to enable progress, but the port needs to be updated to either pass the 64-bitness to the TargetMachine, or fix the DataLayout to avoid subtarget dependent features. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227113 91177308-0d34-0410-b5e6-96231b3b80d8
85 lines
2.8 KiB
C++
85 lines
2.8 KiB
C++
//===-- NVPTXTargetMachine.h - Define TargetMachine for NVPTX ---*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file declares the NVPTX specific subclass of TargetMachine.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_NVPTX_NVPTXTARGETMACHINE_H
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#define LLVM_LIB_TARGET_NVPTX_NVPTXTARGETMACHINE_H
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#include "ManagedStringPool.h"
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#include "NVPTXSubtarget.h"
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#include "llvm/Target/TargetFrameLowering.h"
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Target/TargetSelectionDAGInfo.h"
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namespace llvm {
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/// NVPTXTargetMachine
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///
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class NVPTXTargetMachine : public LLVMTargetMachine {
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std::unique_ptr<TargetLoweringObjectFile> TLOF;
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const DataLayout DL; // Calculates type size & alignment
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NVPTXSubtarget Subtarget;
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// Hold Strings that can be free'd all together with NVPTXTargetMachine
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ManagedStringPool ManagedStrPool;
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public:
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NVPTXTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS,
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const TargetOptions &Options, Reloc::Model RM,
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CodeModel::Model CM, CodeGenOpt::Level OP, bool is64bit);
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~NVPTXTargetMachine() override;
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const DataLayout *getDataLayout() const override { return &DL; }
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const NVPTXSubtarget *getSubtargetImpl() const override { return &Subtarget; }
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ManagedStringPool *getManagedStrPool() const {
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return const_cast<ManagedStringPool *>(&ManagedStrPool);
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}
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TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
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// Emission of machine code through MCJIT is not supported.
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bool addPassesToEmitMC(PassManagerBase &, MCContext *&, raw_ostream &,
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bool = true) override {
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return true;
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}
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TargetLoweringObjectFile *getObjFileLowering() const override {
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return TLOF.get();
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}
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/// \brief Register NVPTX analysis passes with a pass manager.
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void addAnalysisPasses(PassManagerBase &PM) override;
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}; // NVPTXTargetMachine.
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class NVPTXTargetMachine32 : public NVPTXTargetMachine {
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virtual void anchor();
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public:
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NVPTXTargetMachine32(const Target &T, StringRef TT, StringRef CPU,
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StringRef FS, const TargetOptions &Options,
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Reloc::Model RM, CodeModel::Model CM,
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CodeGenOpt::Level OL);
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};
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class NVPTXTargetMachine64 : public NVPTXTargetMachine {
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virtual void anchor();
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public:
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NVPTXTargetMachine64(const Target &T, StringRef TT, StringRef CPU,
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StringRef FS, const TargetOptions &Options,
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Reloc::Model RM, CodeModel::Model CM,
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CodeGenOpt::Level OL);
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};
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} // end namespace llvm
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#endif
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