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llvm-6502/test/MC
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Toma Tabacu 8bec0f9db1 [mips] [IAS] Do not generate redundant ORi in createLShiftOri. 
Summary: If the immediate is 0, the ORi is pointless.

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D8969

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235990 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-28 14:06:35 +00:00
..
AArch64 [MC] Use LShr for constant evaluation of ">>" on ELF/arm64--darwin. 2015-04-28 01:37:11 +00:00
ARM [MC] Use LShr for constant evaluation of ">>" on ELF/arm64--darwin. 2015-04-28 01:37:11 +00:00
AsmParser [MC] Use LShr for constant evaluation of ">>" on ELF/arm64--darwin. 2015-04-28 01:37:11 +00:00
COFF Add a proper fix for pr23025. 2015-04-17 11:27:13 +00:00
Disassembler [PowerPC] Use sync inst alias when printing 2015-04-23 23:05:08 +00:00
ELF Use CIE version 4 for dwarf4. 2015-04-28 13:55:31 +00:00
Hexagon
MachO
Markup
Mips [mips] [IAS] Do not generate redundant ORi in createLShiftOri. 2015-04-28 14:06:35 +00:00
PowerPC Use CIE version 1 for .eh_frame. 2015-04-27 22:04:24 +00:00
R600 R600/SI: Add missing -mcpu=SI to assembler test 2015-04-23 19:33:55 +00:00
Sparc
SystemZ
X86 AVX-512: Added VPMOVx2M instructions for SKX, 2015-04-21 14:38:31 +00:00